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DS80PCI402: About 3.125Gbps FPGA connection

Satoshi
Guru 19555 points
Part Number: DS80PCI402
Other Parts Discussed in Thread: DS50PCI402

Customer is considering DS80PCI402 for 3.125Gbps FPGA(Xilinx Kintex-7) solution.

Please let me check about five points below.

①At first, Can DS80PCI402 use for 3.125Gbps FPGA connection?

If yes,

②Is there careful point for register map and external component?

　For example, register is set to 2.5Gbps / 5Gbps / 8Gbps by 0x11 (datasheet P29).

　If in the case of 3.125Gbps, is 0x11 set 5Gbps (Gen-2) correct?

　Is there point of change? 

③About use case of 3.125Gbps, Is there possibility of spec down the DS80PCI402? 

④When set to 5Gbps, is there frequency (or speed) border of EQ:0dB or not?

⑤If DS80PCI402 can't use 3.125Gbps, is there recommend device? 

【Background】

・Block diagram image is below.

・Customer is carefully whether DS80PCI402 can use certainly, for the reasons of customer application.

Best regards,

Satoshi

  • 0
    TI__Mastermind 43795 points

    Hi Satoshi,

    1. Yes, the DS80PCI402 can be used at all datarates up to 8 Gbps.

    2. Register 0x11[7:5] are status register bits (Read Only).  These are only useful in PCIe applications. For 3.125 Gbps, use the RATE pin = GND to keep the output in limiting mode. 

    3. The DS80PCI402 will operate well at 3.125 Gbps.  The performance should be better than any specifications at 8 Gbps.

    4. For lower speed operation the CTLE or EQ gain will be lower if compared to the gain at 8 Gbps.  Below 200 MHz the gain is flat and close to zero. 

    5. I would recommend the DS80PCI402 for this application.  For signals coming from the Xilinx Kintex-7 use the minimal EQ setting.

    If the cable and PCB is high loss, you could consider using the DS50PCI402.  The CTLE is optimized for 5 Gbps instead of 8 Gbps.

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Guru 19555 points
    Lee-san

    Thank you for kind reply.
    Sorry for addition, please let me know about Question/Answer ② below.
    ⑥Customer interface is not PCIe but GTX transceiver(3.125Gbps), is this no problem, too?
    ⑦About pin setting of RATE pin, which setting the best? (1kΩ to GND, 20kΩ to GND, or Floating)
    　Are these setting the same electrical specification in any case?

    Best regards,
    Satoshi
  • 0 in reply to Satoshi
    TI__Mastermind 43795 points

    Hi Satoshi-san,

    Sorry for the delay.

    6. Any 3.125 Gbps AC coupled interface can work.

    7. The Rate pin can be 1K to GND.