TLK10031: About Link Training

Hi Kanemaru,

There is a mechanism in the TLK10xxx devices to read out the results of a link training sweep. This can be used as a quick link margin measurement, since it indicates whether or not the receiver detected errors across a large number of combinations of transmitter pre-cursor and post-cursor de-emphasis levels.

During link training, the receiver will instruct the transmitter to iterate through different combinations of settings. At each setting, the transmitter sends test packets and the receiver detects whether or not there are errors. Once a point is tested, the receiver asks the transmitter to go on to the next setting. The settings here are the pre-cursor tap and the post-cursor tap of a 3-tap FIR de-emphasis filter (this is a standard transmitter implementation, and an example of it is shown in the presentation I sent you).

Here is the procedure to read out these test results:

1. Write 1’b1 to 0x01.9001 bit 12. This sets a pointer to the link training results that correspond to the minimum post-cursor de-emphasis level. This sort of initializes the read-out process.

2. Read register 0x01.9022. This contains the BER data for all pre-cursor de-emphasis levels for the minimum post-cursor de-emphasis level. The first 8 bits will always be high, but the lowest 8 bits indicate the presence (1) or absence (0) of errors during the testing at that point.

3. If you read register 0x01.9022 again, you will get the results for all the different pre-cursor levels at the next available post-cursor level. Each read will increment the post-cursor level, so you will need to read this register over and over (16 times) and record the values to be able to see results for every different combination. I can help interpret these results, but basically what we are looking for is how many points have the value “0” instead of “1” – lots of points with no errors would indicate a link operating with good margin.

This is all that is needed for TLK10232. For TLK10034, there are a few registers you should write first:

• Register 0x01.9001
o Bit 9 can be used to select the link training algorithm. This influences the settings the device chooses after testing several settings during the link training process. The default value is 0, but the value 1 can be tried instead. This secondary algorithm gives better results overall when tested in our lab, and is the default setting in TLK10232
o Bit 0 can be used to decide how many different settings are tested during link training. The default value is 0, which means that it will only keep trying different settings until a good setting is found (giving a fast execution). Changing this value to 1 makes it so that the algorithm will try all the different available settings and then compute which one is the optimal one. This is required to have a valid read-out of the link training results.
• Register 0x01.9005
o This entire register (bits 15:0) stores the number of training packets that are used to measure the BER for each combination of settings during link training. The default value is 0x0200, but changing to a higher value like 0x1C00 can give better results. The more packets that are tested per point, the higher the chance of identifying a poor setting . The trade-off is execution time, but with 0x1C00 the process should still complete within the 500 ms that is allotted by the IEEE 802.3 standard. (0x1C00 is the default setting for TLK10232.)

The above two registers are good to try first, because they should have the biggest impact on performance. Some other bits to try are:

• Bits 0x01.9001.7:4 can be used to enable different initial states for each different combination of settings. Setting these to 1000 will toggle ENTRACK at the beginning, setting 0100 will repeat the auto-zero calibration process, setting 0010 will toggle the receiver enable, and setting 0011 will reset the taps of the decision feedback equalizer. You can try different combinations of these like 1100, 0111, etc.
• Bits 0x01.9006.15:0 can be used to extend the amount of settling time that is allowed after a change in settings but before the setting combination is tested for bit errors.


Regards,
Luis

Hi Kanemaru,

The RX SERDES settings must still need some type of adjustment. This is where you have to spend time tuning those settings until it's (mostly) error free.
HS_SERDES_CONTROL_1/2/3 (not 4 since that's pre-emphasis, only for copper links not optical)

Focus first on:
HS_ENTRACK
HS_EQPRE
HS_PEAK_DISABLE
HS_H1CDRMODE

Otherwise for LS side, the default values works generally, if not, we should take another configuration once the test is performed (through link and channel status).

Thanks,
Luis