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HD3SS3220: Confused for the PIN INT and register INTERRUPT_STATUS?

Lacey Lin
Intellectual 2900 points
Part Number: HD3SS3220

Hi All,

There are some descriptions in the datasheet about the Pin INT and register INTERRUPT_STATUS.

 

According to the datasheet, The INT pin will be pulled low when the chip updates the registers and the register INTERRUPT_STATUS will held high.

My questions are as follows:

1. Will the status of the register and the voltage of the Pin INT be changed by the chip automatically when there are no CSR changes for a long time?

2. Can customer change the status of register through the I2C?

3. Do the status of the register and the INT pin change at the same time?

I am looking forward to your reply!

Thanks a lot!

Lacey

  • 0
    TI__Mastermind 36085 points
    Hello Lacey,

    The customer must write a 1 to the Interrupt status bit in order to clear the interrupt and the INT pin, the pin will follow the status register automatically. So addressing your questions:

    1. - No, The customer must clear the INTERRUPT_STATUS bit via I2C.
    2.- Yes it can, just follow the datasheet section 7.5 for a detailed description.
    3.-The change on the INT pin is almost immediate

    Regards,
    Diego.
  • 0 in reply to Diego Cortes
    TI__Intellectual 2900 points
    Hi Diego,
    I am confuse about the "The customer must write a 1 to the Interrupt status bit in order to clear the interrupt ".
    The Interrupt status bit will be hold at 1 whenever CSR changes. Is not the customer must write 0 to clear the interrupt?

    Thanks a lot!
  • 0 in reply to Lacey Lin
    TI__Mastermind 36085 points
    Lacey,

    The customer must write a '1' to the register, then the device will clear the interrupt and the register as well. So if the customer tries to read the register again it will contain a 0.

    Regards,
    Diego.
  • 0 in reply to Diego Cortes
    TI__Intellectual 2900 points
    Hi Diego,
    1. You mean when the Interrupt status register is held at "1", the customer also should write "1" to the register to clear the register, right?
    2. After CSR changed, the customer try to write “0” through I2C to the interrupt status bit, but failed. Seems that this bit can’t be write 0 after CSR changed? What should we pay attention to set the interrupt status bit through I2C ?

    Thanks a lot!
    Lacey
  • 0 in reply to Lacey Lin
    TI__Mastermind 36085 points

    Hi Lacey,

       There is no need to write a 0 to the interrupt status bit. The standard and simple procedure to handle the interrupts is the following:

    1. An event occurs, the Interrupt status bit is set to 1 and the INT output is asserted (LOW).
    2. The MCU responds to the INT signal assertion and reads the status registers from the HD3SS3220 (0x08:0x0A).
    3. The MCU writes a 1 to the interrupt status bit in the HD3SS3220.
    4. The HD3SS3220 automatically clears the interrupt status bit and resets the INT output (High).

    Regards,

    Diego.