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TL16C2552FNR data bus output status after power on

Other Parts Discussed in Thread: TL16C2552

Dear all,

we met one issue on TL16C2552 data bus abnormal output issues after power on.

please check below figure, there is about 162ms high level pulse width after power on in all data bus pin and /INT pin. During power on, the /CS and /RESET is pulled to Vcc. but if we power on and power off TL16C2552 quickly for several times, there is no such output pulse. can you please explian whether it is TL16c2552 characteristic? in the same board, if using the part ST16C2552CJ44, there is no such output pulse in all data bus pins.

  

  • Hello Junqiang,

    What controller or processor is connected to the TL16C2552 device?

    I am looking in to this and will get back with you soon once I check the behavior of the data bus during power on.

    Best Regards,

    Joe

  • Hi Junqiang,

    I looked at the device on a bench board. With no external connections to D7-D0 the lines remain low through power-up. I applied a reset pulse and the lines remained low.

    Other than noise on the data bus lines I did not see any glitches or toggling of the data lines.

    Can you send a scope capture of Vcc and RESET during power up?

     

    Thank you

    Best Regards,

    Joe

  • Junqiang,

    Attached is a scope capture of D1, D0, Vcc, and RESET during power on. The TL16C2552 RESET is active high. In the image D0 is the yellow signal, D1 is the blue signal, RESET is magenta, and Vcc is Green. You can see that RESET is high for approximately 300 ms before the data bus goes active.

    I do not see the attachment referenced in the original message.

    Best Regards,

    Joe

  • Hi Joe,

    thanks.

    We don't measure /RESET signal, please see enclosed D7 and Vcc & /CS waveforms, thanks.

      1, The Pin D7 is isolated with bus, Green is Vcc, Yellow is D7 which has width high level pulse

     (/CS is pulled to Vcc, /RESET is floating)

     

    2, /CS &  D0~D7 output:

     3, if D7 pin is connected to bus, the abnormal BUS signal due to D7 high level pulse output after power on.  (all data bus D0-D7 and /INT signal have the same output symptom.

  • Hello Junqiang,

     

    I sent you a document with scope captures of the TL16C2552FN and the ST16C2552 with RESET connected to the host ISA bus and with RESET left floating. I'll test the failing devices when they arrive here in Dallas. As you will see in the document that I sent to you both the TL16C and the ST16C devices behave much the same in my test environment.

    Please let me know if you have any questions.

    Best Regards,

    Joe