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LVDS Owner's manual

Other Parts Discussed in Thread: DS92LV18

Hi,

I have some questions regarding the Deserializer in LVDS Owner's manual

According to " 3.3 Embedded clock (Start-Stop) Bits SerDes" of LVDS Owner's manual(snla187), it is written as the below.

          Upon power-up, the deserializer automatically searches for the periodic embedded-clock rising edge. Since the data-payload 
          bits change value over time while the clock bits do not, the deserializer is able to locate the unique clock edge and synchronize.
          Once locked, the deserializer recovers data from the serial stream regardless of the payload-data pattern. This automatic
          synchronization capability commonly is called “lock to random data” and requires no external system intervention.

My question is the following.

1)If Deserializer can't detect the embedded-clock rising edge for bit error, and after that, Deserializer can detect the embedded-clock rising edge correctly again, can Deserializer recover (rock to clock again)? If yes, I would like to know the mechanism.

2) If embedded-clock is missed by bit error, does Deserializer lose to lock to clock continuously?

I appreciate your quick reply.

Best regards,

Michi

  • Hi Michi,

    Please see my responses to your questions in reference to the Embedded Clock SerDes section of the LVDS Owner's Manual:

    1)If Deserializer can't detect the embedded-clock rising edge for bit error, and after that, Deserializer can detect the embedded-clock rising edge correctly again, can Deserializer recover (rock to clock again)? If yes, I would like to know the mechanism.
    [RH] This section of the LVDS Owner's Manual is referring to the DS92LV18. If this device loses lock by not identifying the embedded clock, it will automatically try to lock to the incoming data. Upon loss of lock, the device will tri-state the outputs while the PLL locks to REFCLK.

    2) If embedded-clock is missed by bit error, does Deserializer lose to lock to clock continuously?
    [RH] The deserializer does not lose lock by missing a single embedded clock due to a bit error. The deserializer needs to miss the embedded clock two times in succession to lose lock. If this occurs, the device will try to lock to the incoming data.

    Regards,
    Ryan