Hi,
I have some questions regarding the Deserializer in LVDS Owner's manual
According to " 3.3 Embedded clock (Start-Stop) Bits SerDes" of LVDS Owner's manual(snla187), it is written as the below.
Upon power-up, the deserializer automatically searches for the periodic embedded-clock rising edge. Since the data-payload
bits change value over time while the clock bits do not, the deserializer is able to locate the unique clock edge and synchronize.
Once locked, the deserializer recovers data from the serial stream regardless of the payload-data pattern. This automatic
synchronization capability commonly is called “lock to random data” and requires no external system intervention.
My question is the following.
1)If Deserializer can't detect the embedded-clock rising edge for bit error, and after that, Deserializer can detect the embedded-clock rising edge correctly again, can Deserializer recover (rock to clock again)? If yes, I would like to know the mechanism.
2) If embedded-clock is missed by bit error, does Deserializer lose to lock to clock continuously?
I appreciate your quick reply.
Best regards,
Michi