This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Interface and data trasfer between FPGA and Processor- TI AM4376 over USB2.0

Other Parts Discussed in Thread: AM4376

Hi,

I have interfaced Xilinx 7 Series FPGA with TI processor- Sitara AM4376 over USB2.0.

I have implemented USB PHY through Cypress USB Controller IC - CY7C68014A (EZUSB-FX2LP). The attached file is the architecture I have implement for USB PHY between processor and FPGA. I can establish the data transfer from processor to FPGA from D+/D- to parallel data.

I am confused with how shall I send the data from FPGA to processor back, over USB when a respective request command is received by FPGA from processor. I have used processor in USB host mode and FPGA as a slave device mode. 

Can some one help with this.

Thanks in advance.