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DS90UB954-Q1: DS90UB954 register clarification

Part Number: DS90UB954-Q1

Hi team,

I was having trouble bringing up DS90UB953/4. 

the sensor is IMX290, with below output format:

the EBD and NULL is with different data type - 0x12 and 0x10.

In such scenario, I'd like to check below registers:

1. 953 0x62, 0x63 register: are they standing for the MIPI line count at 953 side? In this case, do they only stand for the EBD length, not video pixel length?

2. what is 953 0x55 register meaning for? I found the it changes when lock toggling. not sure about the mission mode

3. 954 has line length stable, line count stable register bits. in this case, there're different lines in a frame, including EBD, null, RAW12 video. Is these bits checking the RAW 12 video (0x2C data type) only, or it compares all three data types? 

4. when lock toggling, the 953 CSI_ERR_COUNT is 0x00 while 954 CSI_ERR_COUNT is 0xff. does 953 side only check the CSI from sensor, and 954 checks from the high speed channel? that means the error is from the high speed link transmission.

5. if the sensor CSI output at 953 side has some timing issue, and the 953/4 working in synchronization mode, would it cause the lock to toggle?

besides, I'm curious about when the sensor changing the CSI output:

my customer needs to configure the sensor to different frame rate. when they do the change, previous CSI frame transmitting would be terminated, and a new frame started. in this case, is it necessary to reset 954? not sure if 954 internal CSI buffer can reset automatically.

would this kind of operation impact the forward channel, or the forward channel would establish lock based on the 25MHz reference clock only?

thanks,

Mike