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DP83822I: DP83822 master /slave mode in RMII

1567623
Intellectual 330 points
Part Number: DP83822I
Other Parts Discussed in Thread: CDCE925, DP83TC811

Is it possible to configure a PHY as master & slave frequently? As per data sheet, While configuring PHY as RMII Slave mode & master mode, for slave mode it needs 50MHz clock and for master mode, 25Mhz clock. If we need to change the master and slave configuration time to time, what solution you could suggest for us?. how to coonect clock source?

  • 0
    TI__Mastermind 18425 points
    Hello,

    This is a little different than the usual applications and would need to be tried on a test system like the DP83822 EVM. Could you describe what the end application is?

    This solution will need a programmable clock to switch between 25MHz and 50MHz for e.g. CDCE925. RMII reference clock bit (Register 0x17, bit 7) can be used for selecting the clock frequency.
    The procedure would be as follows,
    1. Change the clock output of the programmable clock source.
    2. Change the clock source in Register 0x17 bit 7 of DP83822.
    3. Do a soft restart using register 0x1F of DP83822.

    -Regards,
    Aniruddha
  • 0 in reply to Aniruddha Khadye
    TI__Mastermind 26320 points

    In Addition to Aniruddha feeback, can you please also explain the use-case which needs to perform frequent change of RMII mode between Master and Slave at phy ?

    Regards,

    Geet

  • 0 in reply to Aniruddha Khadye
    Prodigy 50 points
    Hi Aniruddha,

    Thanks for your timed information.
    Our end application is BroadR Reach Switch module in-vehicle infotainment. One more thing i need to know is regarding the mode selection of RGMII.

    RGMII (Align Mode)
    RGMII (TX Shift Mode)
    RGMII (TX and RX Shift Mode)
    RGMII (RX Shift Mode)

    What are these modes and which mode I should select for i.mx6 processor.

    Regards,
    Akarsh V
  • 0 in reply to Akarsh V
    TI__Mastermind 18425 points
    Hello Akarsh,

    In Align mode, the RGMII TX and RX signals will be synchronized with their respective clocks. In TX Shift mode, only TX_CLK is delayed by 3.5ns relative to transmit data. In RX Shift mode, only RX_CLK is delayed by 3.5ns relative to receive data. In TX and RX shift mode, both TX_CLK and RX_CLK are delayed by 3.5ns relative to their respective data.

    Selecting the correct mode depends on the MAC (1.mx6 processor in this case) and the pcb design. You can provide delay by keeping clock traces longer than data traces but this is not the preferable method as it increases layout complexities. If the MAC does not support internal delays in RGMII mode then you can use the shift modes of the PHY. I would encourage you to verify with the processor technical reference material if it can support RGMII clock shifts.

    Lastly, could you elaborate how frequent changes in RMII Master and Slave function is used in your application?

    -Regards,
    Aniruddha
  • 0 in reply to Aniruddha Khadye
    Prodigy 50 points

    Hi Aniruddha,

    Thank you

    Now we are planning to use only RGMII in our application. 

    One more thing I want to know is the current rating of DP83TC811 in normal operation, standby mode while using RGMII.

    Regards,

    Akarsh V

  • 0 in reply to Akarsh V
    TI__Mastermind 18425 points
    Hello Akarsh,

    I'm glad that your DP83822 questions were solved. Do you mind clicking verify if your original question was answered. If there are other questions about DP83822, please start a new thread. This helps us track customer questions more efficiently.

    Information about unreleased devices is under NDA till market release. We won't be able to share that on open forum right now but we can take this offline. I would recommend reaching out to Sales or FAE contact to start this conversation offline. If you do not have a contact person, please send me a private message on E2E.

    -Regards,
    Aniruddha
  • 0 in reply to Aniruddha Khadye
    Prodigy 50 points

    Thanks Aniruddha!

    My concerns are over.