TMDS181: About active DDC block

Hi Kanemaru,

Yes, SCL_SRC/SDA_SRC and SCL_SNK/SDA_SNK are isolated, the parasitic capacitances is around 10pF, we don't have detailed testing for this parameter.

The active DDC block implements I2C clock stretching, this is why we recommned snoop mode.

The I2C levels on HDMI connector are required to be 5V, while the HDMI receiver may to tolerate it; the customer may need a level shifter which will isolate the capacitances.

Regards

Hi Moises-san,

 

Thank you for the information.

Our customer would like to estimate the maximum capacitance of DDC line to meet “ID 8-9 of HDMI Compliance Test”.

We understand that the capacitance of DDC line is the following elements and we can exclude the parasitic capacitance of SCL_SRC and SDA_SRC pins at Figure.36

- parasitic capacitance of layout pattern

- parasitic capacitance of HDMI Rx

- parasitic capacitance of SCL_SNK and SDA_SNK pins

Is my understanding correct?

 

 

And, we have two questions.

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[Q1]

>The active DDC block implements I2C clock stretching, this is why we recommended snoop mode.

 

I understand that if SCL_SRC and SDA_SRC pins are connected GND, TMDS181 is the snoop mode.

Is my understanding correct?

 

*I can’t find the detail information of snoop mode.

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[Q2]

>The I2C levels on HDMI connector are required to be 5V, while the HDMI receiver may to tolerate it;

>the customer may need a level shifter which will isolate the capacitances.

 

I understand that this level shifter shows the following red circle.

Is my understanding correct?

 

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Regards,

Kanemaru

Hi Kanemaru,

Yes, in Snoop mode you have to add up the capacitances form all the elements in the bus and the path itself.
There is a note in section 8.4.4 explaining this. Snoop mode refers to monitor DDC in SCL_SNK/SDA_SNK; since SCL_SRC/SDA_SRC are not used they are tied to GND.
DDC is monitored to detect changes in TMDS_CLK_RATIO 1/10 for HDMI1.4 and 1/40 HDMI2.0.

I2C has open drain outputs and require pull-ups to set the Vh level, the pull-ups you see are required for normal operation, that figure assumes the receiver is 5V tolerant.
A level shifter can take the signals from 5V levels(depicted in the image) from onde side to 3.3V or 1.8V required by the receiver(other pull-ups connected to 3.3V or 1.8V) in the other side.

The test HDMI1.4 7-13 measures the capacitance in SCL, SDA, and CEC too.

Regards