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TMDS181: Four design queries from customer

M.A.M
Expert 8795 points
Part Number: TMDS181
Other Parts Discussed in Thread: TMDS171

Hi,

My customer have been looking at the TMDS181 redriver/timer IC  but have some questions in that regard. Could you please look into this?

  1. When running device in I2C mode the TX_TERM_CTL setting is fully defined by software. Is there a way to automatically switch termination in this case? Setting “01” is listed as reserved. I2C gives highest flexibility w.r.t. setup however HW mode has automatic termination when TX_TERM_CTL = NC.
  2. Register 0x0A has bit 7 defining “Application mode selector” between 0: Source and 1: Sink (default). What does this change in the device configuration?
  3. The “EyeScan” Tool has options to set DDC slew rate – however the registers are not specified in the datasheet?
  4. We might be going for DDC snooping. However this puts extra capacitive load on the lines. How much is the capacitive load on the SDA_SRC/SCL_SRC and SDA_SNK/SCL_SNK pins?

Thanks. B.r /M.A.M

  • 0
    TI__Mastermind 23815 points

    Hi M.A.M,

    1. In the I2C mode, there is no automatic Tx termination selection, you would have to monitor TMDS_CLK_RATIO bit and adjust the termination accordingly.

    2. This mode is intended for automatic EQ; when sink mode is selected the EQ range is higher to compensate cable losses; when source mode is selected the EQ is range is lower to compensate for PCB traces losses.

    3. EyeScan tool is used for DP149/DP159 and TMDS171/TMDS181, the slew rate feature is for Dp149/DP159.

    4. We strongly recommend DDC snoop mode to avoid any interoperability issue. The capacitance is around 10pF but you have to add up all the components on the bus. You may need a level shifter from 5V in the connector to 3.3V or 1.8V in the receiver, this level shifter will isolate the capacitances.

    Regards