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TLK10031: About the default value of bit1 of CHANNEL_CONTROL_1

Guru 21045 points
Part Number: TLK10031
Other Parts Discussed in Thread: TLK10232

Hi Team,

 

We would like to know the default value of bit1 of CHANNEL_CONTROL_1.

I am confused in the contents of the data sheet…

I understand that the position of "0" and "1" is a mistake.

If yes, we believe that this default value is “0”(so Selects REFCLK_0_P/N) because “Default 1’b0” is mentioned in datasheet.

Is my understanding correct?


 

Regards,

Kanemaru

  • Hi Kanemaru,

    The correct values is as follows:

    0 = Selects REFCLK_0 P/N as clock reference to HS side serdes macro(Default 1'b0)
    1 = Selects REFCLK_1 P/N as clock reference to HS side serdes macro

    I've requested this change in datasheet.

    Regards,
    Luis
  • Hi Luis-san,

    Thank you for your response.

    I understand. Thank you very much.

    Regards,

    Kanemaru

  • Hi Luis-san,

     

    I have one more question.

    I found some similar mistakes and understand that “Default 1’b x” is correct information.

    Is my understanding correct?

    And, could you revise these contents in the datasheet?


     

    Regards,

    Kanemaru

  • Hi Kanemaru,

    Good catch! Please let me verify with the team, in my understanding we need to change these values since this device was leveraged in the TLK10232. If so, I will request these changes in datasheet ASAP.

    Thanks,

    Luis

  • Hi Luis-san,

    I greatly appreciate your cooperation.

    Please continue to give us your support.

    Regards,

    Kanemaru

  • Hi Luis-san,

     

    I have additional questions.

     

    --------

    [Q1]

    I would like to know the truth default value of the following resisters.

    -10G_TX_MODE_SEL(G)

    -SW_PCS_SEL(RX)

    -SW_DEV_MODE_SEL(RXG)

    -10G_TX_MUX_SEL(G)

    -REFCLK_SW_SEL(RXG) (I understand that default values is “1’b0” so “Selects REFCLK_0_P/N as clock reference to HS side serdes macro”)

     

    [Q2]

    Based on [Q1], please let me ask a question again.

    is there the modification in your past answer?

     

    https://e2e.ti.com/support/interface/high_speed_interface/f/138/p/605953/2240118#pi239031350=1

     

    <Your past answer>

    If the customer is going to use 10GBASE-KR mode, they just need to change the HS_PLL_MULT[3:0] to '1100' (x16.5),

    in this case the device is going to perform Auto-Negotiation and Link Training, if the these featured are no needed please disable them.

    --------

     

    Regards,

    Kanemaru

  • Hi Kanemaru,

    A1. We need to modify the default values for these registers since there is a swapping error. Hence the correct default values are as follows:

    10G_TX_MODE_SEL

    0 = TX mod dependen upon TX_MUX_SEL (Default 1b'0)

    1 = Enables 1 to 1 mode on transmit channel.

    SW_PCS_SEL

    1 = Set the device to 10GBASE-KR mode (Defaul 1b'1)

    0 = Set the device to 1G-KX mode

    SW_DEV_MODE_SEL

    1 = Device SET TO 10G mode

    0 =  In clase 45 mode, device mode is set using Auto-Negotiation. In Clause 22 mode, device is set to 1G-KX mode (Default 1b'0).

    10G_TX_MUX_SEL

    0 = 2 to 1

    1 = 4 to 1 (Default 1b'1)

    REFCLK_SW_SEL

    0 = Selects REFCLK_0_P/N as clock reference (Default 1b'0).

    1 = Selects REFCLK_1_P/N as clock reference.

    Note. Please take the TLK10232 datasheet as reference for default values registers.

     

    A2. By default the device is set in 10GBASE-KR mode, just please change the HS_PLL_MULT[3:0].

    Best Regards,

    Luis Omar Moran

    High Speed Interface

    SWAT Team

     

     

  • Hi Luis-san,

    Thank you for the information.

    I understand. Thank you very much.

    Regards,

    Kanemaru

  • Hi Luis-san,

     

    I have an additional question.

    Could you please let us know the release schedule of new datasheet?

     

    Regards,

    Kanemaru

  • Hi Kanemaru,

    I've requested these changes to fix the datasheet, unfortunately I do not have the exact date to release it since depends of another teams. For now, please refer to the TLK10232 datasheet for the register map.

    Thanks,

    Luis

  • Hi Luis-san,

    Thank you for your prompt reply.

    Please contact me if you obtain a schedule.

    Regards,

    Kanemaru