DP83822HF: How to terminate the TD_x, RD_x in 100BASE-FX application

Hello Yaoting,

The EVM is configured to operate in Copper Ethernet mode. For Fiber operation, the EVM will need hardware changes. The outputs are LVPECL. The necessary hardware changes are listed in section 2.7 of the User's Guide. 49.9ohm terminations are required for standard ethernet operation over copper interface. After making the hardware changes, you can use any SFP module rated for 100Base-FX operation.

-Regards,
Aniruddha

Hi Aniruddha,

thank you for your response. Yes. we did the changes according to the section 2.7 of modification instruction. But it does not work properly. 

If the output of the phy-chip is LVPECL can we terminate them as usual as normally we do, that is, pull down them to ground by a 150 ohm resistor respectively instead of pulling up by a 50 ohm resistor to 3.3v?

Thanks.

Yaoting

FTLF1217P2BTL-299091.pdfHi Aniruddha,

We tried the termination change. It looks like the port's output is not standard LVPECL. without the 50 ohm pull-up resistors to +3.3V circuit has no output at all.

we use an SFP module that datasheet is attached. Could you help me to check if it is suitable to be used in this application?

Thanks a lot

Yaoting

Hi,

Kindly check strap settings are correct to configure DP83822 in Fiber Mode. Also the SFP module has Signal Detect pin i/f. Ensure the levels are matching with configured on DP83822.

You can refer to DP83822 EVM for Fiber settings. Additionally we have TI Reference design for DP83822 demonstrating the Fiber interface connections.

http://www.ti.com/tool/TIDA-00928

Regards,
Geet

Thank you for your reply.

We are still stuck. We use loopback functions to check the DP83822's working status. it is working for near loopbacks of MII, PCS and digital but not for analog loopback and external loopback. No waveform could be seen at TD_P/M. How could it be like this? Could be a wrong chip or any setting issue? We are under high chronic pressure. Could you help us?

Also, we found the chip on EVM board with the marking of "P822HF" while the one we are use with the marking of "822HF". Any difference?

BTY, the EVM board is working with our optical fiber SFP transceiver.

Looking for any helps urgently!
Appreciated a lot.

Yaoting

Hi Yaoting,

I am sorry for the confusion above. Our driver is a current mode driver. This is why we have the 50 ohm termination requirement and why you need DC blocking caps.

Please check that you have the correct bootstrap settings, COL pin strapped to MODE 2 or MODE 3 [Enables 100BASE-FX operation].
Can you provide a register dump of registers 0x0h to 0x1Fh?

The IC you have is the same as on the EVM, no difference.

Best regards,
Ross

COL is strapped to Mode 3.

A list of the registers' information is shown as the attached file below.

 

Hi Yaoting,

The bootstrap for RX_DV is probably your issue here. The pin is strapped for MODE2, which is a violation.
You need to have it in MODE 1 for MII operation. Please add an external pull-down since it appears your connected MAC is pulling the pin high.
Also, a few of your other pins are oddly in MODE 2 as well: RX_D[3:0]

Best regards,
Ross

Thanks, Ross.

We are using an NXP processor LPC4330 which has an Ethernet port. We did not notice that all its pins have a 50K pull-up resister until now. Although based on its manual the resistors could be disabled we still found it effective even after we tried disabling them. Yes it definitely changed the bootstrap voltage required. I will add 2K pull-down resistors to all RXD pins as well as RX-DV pin for their default settings today to see any improvement.

But, i have something confused.  Our software engineer has already used MDIO port to configure all related registers according to MII & FX settings. Why does not  it work? Dose it mean bootstrap is a mandatory requirement?

Thanks a lot. 

Yaoting

Hi Yaoting,

After you program the registers, are you doing a soft reset to register 0x1Fh by writing 0x4000h?
What could be happening is the why is in a funny state since you provided it a 25MHz clock, but the PLL expected a 50MHz.

Please try with the pull-down to see if there is improvement.

Best regards,
Ross

Hi Ross,

After we add the pull down resistors we can get correct values from bootstrap registers (0x467 and 0x468)  which show that, the 0x467=0803h and 0x468=0000h. The circuit is working now. But, i still have questions for you,

1) the BMCR register(0x000) equals to 3100h, that shows the bit12 = "1". It means the Auto-negotiation is enabled and it says this bit is related to Strap. My questions is, which strap setting will affect this setting? In FX working mode, should we allow the auto-negotiation?

2) the BMSR register(0x001) equals to 7849h. It shows bit3 ="1". it means "Device is able to perform Auto-Negotiation". Is it related to above question? Also, the bit2="0". It shows link is not established. but actually, we can communicate over the link, why?

Looking forward to your answers.Thank you for your helps. 

Yaoting