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DP83867IS: DP83867 PIN 33 and 34 clock outout question

Part Number: DP83867IS

 

  

dear

     the pin 33 and 34 of dp83867IS  are differential SGMII clock output,why is pin 34 drived by mac and  pin 33 drived by phy?

if l don`t use the clock output, MAC recover clock from receiving data .what `s the clock and vpp?

if l use the clock,if the phy supply the 625M clock to MAC? what`s the vpp?  thank you very much!

          best wishes

 

  • Hi du zhang,

    Pin 33 and pin 34 are both driven by the PHY. The MAC does not drive pin 34.

    Yes, the MAC will recover the clock IF the MAC supports that feature.

    The clock output from the PHY meets the LVDS signaling specs in the SGMII standard. Please read the SGMII standard for discussion about the Vpp.

    Best Regards,