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DS90UB925Q-Q1: Question for DS90UB303

Part Number: DS90UB925Q-Q1

Hi,

We use the DS90UB303 in our produce and got an urgent issue related to its 0x0C General Status resister.

I am seeing 0x0C[2] PCLK Detect. According to datasheet, it can detect Pixel Clock Status, is 0 when valid PCLK is not detected.

My question is what is "invalid" PCLK. I need clear scenarios how this chip can detect it as invalid. On our product, it looks DS90UB303 receives correct PCLK (LVDS), but we detected "invalid" PCLK.

Please give us idea.

Regards,

Y

  

  • Hello Yasuhiro-san,

    On your comment "it looks DS90UB303 receives correct PCLK (LVDS)" the 303 is receiving the internal default oscillator frequency from the 925.
    If you measure the output PCLK of the 303 you will notice that the frequency is different from what the source PCLK is to the 925.

    The quickest way to figure out why the 925 does not detect a valid PCLK is to measure the PCLK into our 925 at the input of the 925.
    From the waveform I can give you more information of why the 925 does not detect a valid PCLK.
    For example:
    1) is the amplitude of the PCLK correct?
    2) is there overshoot outside our maximum rating?
    3) is there undershoot outside our minimum rating?
    4) is the frequency of the input PCLK within the specified range of the 925?
    5) is there spread spectrum on the PCLK? If so what is the deviation and frequency of the spread spectrum?
    6) How much jitter is on the PCLK?

    Regards