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SN65DSI84: SN65DSI84

Part Number: SN65DSI84

Dear TI,

       Please help us with DSI tuner values for dual lvds mode settings with frame rate of 60Hz.
Because when we are setting it to 60fps display works fine at first time but after reboot
display is not at all working, need your help in finding out proper values to input in DSI tuner tool.
We are using display of Module 15.6”FHD Color TFT-LCD, Model Name "G156HTN02.0" .
Please find snapshots of values used on DSI tuner tool.

LCD SPEC


  timing5: timing5 {
   screen-type = <SCREEN_MIPI>;
   lvds-format = <LVDS_8BIT_1>;
   out-face    = <OUT_P888>;
   clock-frequency = <141860000>;
   hactive = <1920>;
   vactive = <1080>;
   hback-porch = <30>;
   hfront-porch = <60>;
   vback-porch = <10>;
   vfront-porch = <15>;
   hsync-len = <15>;
   vsync-len = <5>;
   hsync-active = <0>;
   vsync-active = <0>;
   de-active = <0>;
   pixelclk-active = <0>;
   swap-rb = <0>;
   swap-rg = <0>;
   swap-gb = <0>;
   swap-delta = <0>;
   swap-dummy = <0>;
  };

void DSI84_MIPI_to_DUAL_LVDS_G156HTN020()
{
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_SOFT_RESET   , 0x00);// reg 0x09
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CORE_PLL   , 0x05);// reg 0x0a
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_PLL_DIV    , 0x28);// reg 0x0b
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_PLL_EN    , 0x00);// reg 0x0d
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_DSI_CFG    , 0x26);// reg 0x10
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_DSI_EQ    , 0x00);// reg 0x11
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_DSI_CLK_RNG  , 0x55);// reg 0x12
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_LVDS_MODE   , 0x6c);// reg 0x18
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_LVDS_SIGN   , 0x00);// reg 0x19
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_LVDS_TERM   , 0x03);// reg 0x1a
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_LVDS_CM    , 0x00);// reg 0x1b

                  //W=1920
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_LINE_LEN_LO  , 0x80);// reg 0x20
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_LINE_LEN_HI  , 0x07);// reg 0x21

                  //H=1080
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_VERT_LINES_LO , 0x38);// reg 0x24
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_VERT_LINES_HI , 0x04);// reg 0x25

 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_SYNC_DELAY_LO , 0x20);// reg 0x28
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_SYNC_DELAY_HI , 0x00);// reg 0x29

 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_HSYNC_WIDTH_LO , 15);// reg 0x2c
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_HSYNC_WIDTH_HI , 0);// reg 0x2d
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_HORZ_BACKPORCH , 30);// reg 0x34
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_HORZ_FRONTPORCH , 60);// reg 0x38 

 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_VSYNC_WIDTH_LO , 5);// reg 0x30
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_VSYNC_WIDTH_HI , 0);// reg 0x31
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_VERT_BACKPORCH , 10);// reg 0x36
 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_VERT_FRONTPORCH , 15);// reg 0x3a

 i2c_reg_write(SN65DSI84_I2C_ADDR, DSI84_CHA_TEST_PATTERN , 0x00);// reg 0x3c
}


rockchip,dsi_hs_clk  = <851.16>;

use debug board . and use command    "  dumpsys display | grep DisplayModeRecord        "

can see fps :  DisplayModeRecord{mMode={id=1, width=1920, height=1080, fps=63.000004}}

  • Hello Kushal,
    Please, share the procedure that you are following to reboot the SN65DSI84. What is the mode DSI data and clock lanes at this process?
    Also, generate a register dump of the DSI84 when the issue occurs. Is there any change in the register map? What is the status of the interrupt register (0xE5)?
    Regards
  • Hi Sir,
    Sorry for wrong input, with the changes mentioned with snapshots display isn't showing anything. Just blank screen with few white vertical ilnes and its not going to normal homescreen like as usual. We tried different values for hpw, hfp, hbp etc etc,.... as mentioned in DSI tunes tool procedure but failed repeatedly. Please help us with proper values so that we can make display up and running normally.
    Sorry for late response.
    -
    Regards
    Kushal
  • Hi Sir,
    Sorry for wrong input, with the changes mentioned with snapshots display isn't showing anything. Just blank screen with few white vertical ilnes and its not going to normal homescreen like as usual. We tried different values for hpw, hfp, hbp etc etc,.... as mentioned in DSI tunes tool procedure but failed repeatedly. Please help us with proper values so that we can make display up and running normally.
    Sorry for late response.
    -
    Regards
    Kushal
  • Hello Kushal ,

    Have you tried enabling the internal pattern mode? You can generate the register configuration for this mode through the DSI Tuner. Please, enable this mode and if the pattern is shown correcltly the issues is likely the DSI power-up sequence or a mismatch between the programmed video parameters and the provided by the GPU

    Regards
  • Hi Joel,
    I am able to generate test pattern with the register configuration obtained from DSI tuner tool. With 40fps settings display is working properly, that means DSI power up sequence should be okay I guess. Only when we are changing it 60fps display is not showing anything as mentioned earlier. If you can help us with the DSI tuner parameters for 60fps then I can try on my board. Display spec is open for all and below is the link
    www.display-solution.com/.../AUO_G156HTN02.0_20160418.pdf

    -
    Regards
    Kushal
  • Hello Kushal,

    Is it possible for you to send a scope capture showing Vcc, EN, DA0N, and DACN at power up? I want to confirm if you have enough time in the reset time pulse.

    It seems that the timing configuration provided by the DSI video source (APU) is not matching the recommendation generated by the DSI Tuner tool he DSI8x does not realign timing. Please, confirm if your the line time (horizontal sync to the next horizontal sync timing from the APU) on the input is 15.015us. 

    Regards

  • Hi,

        Please find attached waveforms as requested and DSI tuner tool output snapshot.

    -

    Regards

    Kushal

  • Hello Kushal,

    I'm assuming that channel 3 (in the scope capture) is Vcc and channel 2 belongs to the EN signal. Therefore, it looks that you are not following the power-up sequence since the DSI data and clock lanes are not in LP11 mode before the EN assertion. Please, follow the procedure stated in the "Recommended Initialization Sequence" table or the "RESET and Initialization Timing Definition While VCC is High" figure.

    Regards
  • Sorry for the wrong attachment , please find correct waveform attached .

    -

    Regards

    Kushal

  • Hello Kushal.

    Looks like the signals are in LP-00 mode at power-up assertion. Please, configure the DSI interface (data and clock) in LP-11 mode before the EN terminal is asserted as stated in the datasheet.

  • Hi Joel,

        Which data sheet you are referring ? I am not able to find this table in my datasheet (SLLSEC2F –SEPTEMBER 2012–REVISED AUGUST 201 )
    Please share the updated data sheet if any. 

    -

    Regards

    Kushal

  • Please help me with data sheet containing this table which you are referring to, I think we are using outdated datasheet (SLLSEC2F –SEPTEMBER 2012–REVISED AUGUST 201) . Please share latest datasheet if any.
  • Hello Kushal. 

    That table is part of the MIPI DPHY version 1.0 spec. You can find more details on the section 5.2 Lane States and Line Levels in the mentioned document. 

    The initialization/transition sequence requirement is per the MIPI DPHY version 1.0.0 (Section 6.11) and DSI version 1.02.0 (Section 5.7) specification requirements.

    Keep in mind that If DSI interface is driven to illegal states/protocol by the host, the SN65DSI8x may get into undesirable states  

    Regards

  •            If initialization sequence was wrong then no display would have worked. We almost tried with 5-7 displays but no where we faced such issue. Only on the AUO display we facing issues that too if we set fps=60Hz. So need ur suggestions in setting the DSI tuner parameters and also data sheet of display is attached in this thread for your reference.

  • Hello Kushal,

    We cannot guarantee the correct device performance if you do not follow the sequence. As I mentioned before, If DSI interface is driven to illegal states/protocol by the host, the SN65DSI8x may get into undesirable states. Therefore, your system may get stuck after rebooting it several times.

    Regards