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DS90UB913A-Q1: SCL High and Low Time Setting

Mark Malik
Prodigy 210 points
Part Number: DS90UB913A-Q1

SNLA222 shows in Table 6 that to achieve 400kbps the SCL High and Low should be set to 0x32.  0x32 translates to 50 decimal.  50 * 2 (for low and high periods) *50ns (nominal reference clock period) = 5us total SCL period.  SCL frequency in this case is 200kHz.  Is the information in SNLA222, Table 6 correct?

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    TI__Genius 12705 points
    Hello There are two known issues with 913 I2C app note SNLA222.
    As you point out, Table 6 gives values for SCL high and low time of 0x32, which is 200kbps, but lists it as 400kbps.
    The latency section describes a maximum delay of 24us, but this is at nominal oscillator frequency and can actually be higher with a variance of +/- 20%.