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DS26C31T: Maximum operating frequency and the materials about it

F.N
Expert 8760 points
Part Number: DS26C31T

Hi team,

My customer wants to know DS26C31T maximum operating frequency, so after searching
on E2E(*1) I informed the customer that the maximum operating frequency is 15 Mhz.

*1: https://e2e.ti.com/support/interface/industrial_interface/int-industrial_interface/f/144/p/163042/593795

Then the customer requests the materials about it.

Do you have any materials that you can offer?

Best regards,
Fumio Nakano

  • 0
    TI__Intellectual 1895 points

    Hi Fumio,

    you can determine the maximum operating frequency by checking 7.4 Switching Characteristics on page 6 of the datasheet.

    • tTLH, tTHL Differential Output Rise And Fall Times -> max 10 ns for the DS26C31T

    Further take a look at Figure 25 on page 11 on the Datasheet

    • A bit contains a rising edge tTLH, a high level period and the falling edge tTHL -> Period T = tTLH + high level period + tTHL 
    • Lets assume the high level period should last for a minimum of 3 x  tTLH/tTHL in order to sample the bit properly -> Period T = 50 ns  -> fmax = 20 MHz

    Let me know if that helps you out.

    Kind regards 

    Dierk

  • 0 in reply to Dierk Bronner
    TI__Expert 8760 points
    Hello Dierk-san,

    Thank you for your prompt reply.

    I think that the following is correct, how is it?

    sample the bit properly -> bit width = 50 ns -> rate max 20Mbps -> fmax = 10 MHz

    If above is correct, what is the difference between above and following E2E answer which is 15MHz(30Mbps)?

    ・e2e.ti.com/.../593795

    I assumed the following expression from the above thread.

    ｆ= 0.5/(tTLH + tTHL + 1.3*Max[tTLH, tTHL]) = 0.5/(10ns+10ns+13ns)=15MHz

    Best regards,
    Fumio Nakano
  • 0 in reply to F.N
    TI__Guru 62920 points
    Hello Nakano-san,

    Either calculation could be used. There isn't a single equation that can be used to translate rise/fall times in to signaling rate, but different "rules of thumb" are often recommended.

    At minimum, a bit period (i.e., the reciprocal of the signaling rate) needs to be long enough to include enough time for the signal to fully transition from one state (high or low) to the next state and back again. In addition, it is typically good practice to also allow for some settling time in between these transitions in order to give some timing margin to the receiving system and allow the transmitter's output to more closely approach its steady-state value.

    The duration of this settling time depends on how much margin is desired based on end application requirements. You are correct that the previous e2e post budgeted for ~1.3x of the transition time for this settling time, which is a good general recommendation. This value is not a hard limit, though, and could be increased or decreased to give different waveform qualities.

    I hope this is clear - please let me know if you have further questions.

    Regards,
    Max Robertson
  • 0 in reply to Miguel Robertson
    TI__Expert 8760 points
    Hello Dierk-san,

    Thank you for your answer.

    Best regards,
    Fumio Nakano
  • 0 in reply to Miguel Robertson
    TI__Expert 8760 points
    Hello Max-san,

    Thank you for your answer.

    Best regards,
    Fumio Nakano