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TCA9803: What is the Vilc level?

Nina Prabhu
Prodigy 10 points
Part Number: TCA9803
Other Parts Discussed in Thread: TCA9509

I need to use a part which has low VOL levels and VIL levels >0.5 V (on the 3.3V side) for my application where i am level shifting from 3.3V to 1.8V. The TCA9803 seems like a very good fit, however the Vil is mentioned as 0.3*Vcca/Vccb and a note is mentioned saying this is for the first LOW seen. what about subsequent LOW levels? (Typically this is called out as Vilc in other datasheets like TCA9509) Can i assume that a VOL of 0.5V will keep the bus LOW for subsequent cycles as well?

Also, in other level shifter datasheets (like TCA9509) why is it that the Vilc is mentioned only for one side? (in this case, SCLA/SDA) 

  • 0
    TI__Guru 73971 points

    Hey Nina,

    The TCA980x family does not have a Vilc. The reason for this is because the device is not looking to see if the device falls below a certain voltage. This device works differently than how most buffered offsets work and instead looks to see if the current is being sourced or sunk as a means to tell which side pulled low. Vil is 0.3xVcc.

    However because we look at current now instead of voltage, we have an I(ilc) we care about in the case of contention. This is discussed in section 9.4.1.1:

    ^This means during contention, we do not need to go below an additional voltage threshold (Vilc) to see a contention state but rather we must be able to sink the required I(iLc). Thus there is a maximum allowable "on" resistance from of the transceiver's FET (open drain structure). This a function of the Vol of the transceiver and the I(oL) and can be used to calculated R_on(max).

    "Also, in other level shifter datasheets (like TCA9509) why is it that the Vilc is mentioned only for one side? (in this case, SCLA/SDA) "

    This question is not related to level shifters but buffers. Buffers typically use a voltage level offset which is required on one side to understand which side is pulling down. This is done to prevent SDA/SCl drivers from latching. When you are below VILC, while the other side pulls low, when the other side releases the zero is immediately propagated back. This is related to how the digital logic enables and disables low side drivers. You only need to have one static voltage offset on one side and thus you only need to know one Vilc.

    I was told the newer TCA980x removed the Vilc parameter because it made more sense to look at the current because internally we look at the voltage generated when the current is being sourced or sunk to know which side pulls low. The TCA9509 keeps the old terminology of using Vilc to help users/readers relate this device to other buffers (even though it does not use a standard static voltage level offset). TI decided to move away from this as it made more sense to understand contention with these parts using I(iLc). I believe (I may have to get back to you on this) that the TCA9509 may also have different internal circuitry to tell if current is being sunk or sourced as compared with the TCA980x.

     

    Extra:

    How much bus capacitance do you expect on your I2C bus? It may be easier/better for you to place the A side of TCA980x on the higher capacitance side to ensure the rise times aren't greatly affected.

     

    Thanks,

    -Bobby