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PCI1410A: Interrupt Timing Diagram

Ivie Hanakawa
Prodigy 30 points

Part Number: PCI1410A

Hello,

Can anyone provide a timing diagram or state machine diagram of the internal activities of the PCI1410A before and after a PCI interrupt is generated?  We would like to know which signals are asserted/de-asserted and when with respect to the PCI interrupt.

Thank you very much,

Ivie

  • 0
    TI__Expert 7395 points
    Hello Ivie,

    TUSB1410A is a legacy device that it is no longer recommended for new designs; because of that we no longer have any information besides the one already published on our website. I would recommend to check the PCI1510.

    Both devices are compliant to the PCI and PC card standards, so I would recommend to check the following specifications for the details you are looking for:
    • Advanced Configuration and Power Interface (ACPI) Specification (revision 1.1)
    • PCI Bus Power Management Interface Specification (revision 1.1)
    • PCI Bus Power Management Interface Specification for PCI to CardBus Bridges (revision 0.6)
    • PCI to PCMCIA CardBus Bridge Register Description (Yenta) (revision 2.1)
    • PCI Local Bus Specification (revision 2.2)
    • PCI Mobile Design Guide (revision 1.0)
    • PC Card Standard (revision 7.1)
    • Serialized IRQ Support for PCI Systems (revision 6)

    Regards,
    Jorge