Other Parts Discussed in Thread: TLK105L
Hi,
I have a question about DP83822I reset timing.
From the datasheet of DP83822I, I couldn't find the timing specification
between VDDIO/AVD and Hardware RESET_N.
Are there any timing specification between VDDIO/AVD and Hardware RESET_N?
What I want to know is,
does Hardware RESET_N need to be deasserted after VDDIO/AVD have been stabilized?
If yes, how long should RESET_N need to be assert after VDDIO/AVD have been stabilized?
From the datasheet of DP83822I, I couldn't find the above timing specification.
best regards,
g.f.