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DS80PCI402: Where can I get the detailed reference schematics containing a sample schematic for configuring this part via EEPROM?

Phillip Nguyen
Prodigy 150 points
Part Number: DS80PCI402

We plan to use your DS80PC1402 in one of our designs. You offer an evaluation kit (DS80PCI402EVK) with configuration of this device via IOs. We need to configure the DS80PC1402 via an I2C programmable EEPROM. Please provide me with a reference schematic for this type of application, containing a sample schematic(s) for configuring this chip via EEPROM.

  • 0
    TI__Mastermind 43795 points

    Hi Phillip,

    I have attached a link to an applications note which covers the DS80PCI402 and EEPROM configuration. 

    The basic pin connections I recommend for EEPROM configuration.

    ENSMB = Float

    RXDET = Float

    RATE = Float

    SCL and SDA use ~ 2K pullups

    AD[3:0] = Recommend B0, B2, B4 in sequence when multiple PCI402's are used.

    READ_EN# = 0 (For 1st PCI402 only)

    Daisy chain ALL_DONE -> READ_EN on remaining repeaters.

  • 0 in reply to Lee Sledjeski
    Prodigy 150 points

    Hi Lee,

    Thank you for the detailed information.

    Can you  please recommend a specific EEPROM we should use?  

  • 0 in reply to Phillip Nguyen
    TI__Mastermind 43795 points

    Hi Phillip,

    I generally recommend the AT24C0x or equivalent EEPROMs.  In most cases the 01/02 version will be enough space.  It just depends how many devices are connected to a single EEPROM.  I also recommend to get the 1MHz version for added margin.  The master mode in the DS80PCI402 can run slightly above 400 KHz.

    Best Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Prodigy 150 points
    Thank you very much for the EEPROM information, Lee! The CAT24C0X chips specifies the Fscl clock to be ok between 100-400KHz. What is actually the most typical frequency being used? (I assume it’s best not to exceed 400KHz)

    I have an additional question: the DS80PCI402 datasheet provides a clear description of the SMBus Master Mode setup, but the SMBus Slave Mode setup sequence for DS80PCI402 configuration via a controller is not very clearly described (i.e. PRSNT* and ESNSB signals etc). Can you clarify this for me please?
  • 0 in reply to Phillip Nguyen
    TI__Mastermind 43795 points

    Hi Phillip,

    The typical frequency is ~ 400 KHz.  It is possible for the onboard oscillator to exceed 400 KHz SMBus speed.  For this reason we recommend EEPROM devices which can handle 1 MHz at 2.5V operation. 

    For SMBus Slave Mode

    ENSMB = 1

    RATE = Float, RXDET = Float, SD_TH = Float, LPBK = Float

    Set AD[3:0] and VDD_SEL as needed

    I would recommend connecting the PRSNT# pin to the system PRSNT# signal if the endpoint attached to the DS80PCI402 may be inserted or removed during normal operation.

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Prodigy 150 points

    We want to implement in our design the capability to configure the DS80PCI402 chip via an FPGA in all 3 modes (master, slave, pin) and have the following additional questions:

     

    1. The ENSMB pin needs to be config to FLOAT in order to read the configuration from an external EEPROM (Master SMBus  mode). In the DS80PCI402EV Kit User Guide, the included schematic shows that the ENSMB signal is connected to a 3 section DIP switch, with 1K pull-up resistor, 1 K pull-down resistor, and a 20K pull-down resistor.  What is the purpose of the 20K pull-down resistor? Is it to configure the ENSMB input to FLOAT ? If so, why can’t this be achieved by having only a 2 section DIP switch and by setting both switch section to OFF ? Do we need a 20K pull-down for this signal if we connect it to an FPGA I/O and if we set the I/O to HighZ to put the ENSMB input in FLOAT state?

     

    1. Can we connect the READ_EN#, PRSNT#, DEA0/1, EDB0/1, DEMB0/1 signals to FPGA I/Os, to set them to the desired logic level, and not use any additional pull up or down resistors?

     

    1. Can we configure the above configuration signals as needed and then set READ_EN# HIGH, and then LOW, to reset the DS80PCI402 chip and configure it based on the state of the signals on configuration inputs?

  • 0 in reply to Lee Sledjeski
    Prodigy 150 points
    Hi Lee,

    We want to implement in our design the capability to configure the DS80PCI402 chip via an FPGA in all 3 modes (master, slave, pin) and have the following additional questions:

    The ENSMB pin needs to be config to FLOAT in order to read the configuration from an external EEPROM (Master SMBus mode). In the DS80PCI402EV Kit User Guide, the included schematic shows that the ENSMB signal is connected to a 3 section DIP switch, with 1K pull-up resistor, 1 K pull-down resistor, and a 20K pull-down resistor. What is the purpose of the 20K pull-down resistor? Is it to configure the ENSMB input to FLOAT ? If so, why can’t this be achieved by having only a 2 section DIP switch and by setting both switch section to OFF ? Do we need a 20K pull-down for this signal if we connect it to an FPGA I/O and if we set the I/O to HighZ to put the ENSMB input in FLOAT state?

    Can we connect the READ_EN#, PRSNT#, DEA0/1, EDB0/1, DEMB0/1 signals to FPGA I/Os, to set them to the desired logic level, and not use any additional pull up or down resistors?

    Can we configure the above configuration signals as needed and then set READ_EN# HIGH, and then LOW, to reset the DS80PCI402 chip and configure it based on the state of the signals on configuration inputs?
  • 0 in reply to Phillip Nguyen
    TI__Mastermind 43795 points

    Hi Phillip,

    The ENSMB pin does not need the 20K pulldown.  The three important settings are 0, Float, and 1 which can be achieved with a simple 3-state FPGA output.  It is important to match the supply level and logic "1" of the components.  If the DS80PCI402 VIN pin = 3.3V, then the FPGA driving the ENSMB (and other inputs) must also drive them to 3.3V to achieve a logic "1".  Driving to only 2.5V will not work properly.

    Yes you can connect the other configuration inputs to FPGA signals as well.  I would recommend to use 3-state outputs to achieve the "Float" level.  Please note that a single FPGA output will not be able to replicate the 20K to GND condition.  I would suggest to add space for the 20K resistor to GND as well.

    As long as the ENSMB pin is driven low the DS80PCI402 will respond to the configuration inputs.

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Prodigy 150 points

    Thank you very much again, Lee! That was immensely helpful.