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TPS65982: Sequence to support UFP_D Assignment

Part Number: TPS65982

Hi Team,

My customer want to know that the contract of Alt mode is established with UFP_D Assignment E for system control because they need to control some other devices for line and polarity swapping to meet UFP_D Assignment E pin assignment requirements.

Could you review following sequence and check if it works properly?

1. Observe the change of Data Status at DataStatusUpdate (Bytes 1-4, bit 25) event of IRQ
2. Check the value of Data Status (0x5F) at EC
3. Check the UFP_D Assignment E from the prescribed register below and change scalar's line and polarity setting by I2C

[Data Status in case of UFP_D Assignment E]
0x5F [11: 10]: 00b DPPinAssignment
0x5F [5]: 0b USB3Connection
0x5F [9]: 1b DPS sourceSink

Regards,

Takashi Onawa

  • Hi Onawa-san,

    Are they using an EC to control a DP mux in their system? My understanding from your question is that the customer would like to read back the Data Status register to confirm the pin assignment when DP mode is entered. Afterwards, they will interface with their mux based on what they read back from the TPS65982?
    If my understanding of the application is correct, then the steps that you highlighted should work for their system.

    Thank you,
    Eric
  • Hi Eric-san,

    Your understanding is correct.

    They want to control DP mux by GPIO of PD controller such as TPS65982 but our mux devices doesn't support UFP_D Assignment E by itself because it doesn't have lane and polarity swapping. So they need to get a timing when DP mode is entered for such the control.

    Regards,
    Takashi Onawa