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PCA9548A: Need to confirm pins status when reset

Part Number: PCA9548A

Hi,

Can anyone tell me if PCA9548A is under reset, what status will SCL,SDA,SC0-7,SD0-7 pins be? Could these pins be tied with GND? All these pins are pulled up to 3.3V.

In datasheet page 10, there is a figure like below. When this chip is under reset, what status would the MOS signed with red be? OPEN? CLOSE? UNCERTAIN?

  • Hello,

    "Can anyone tell me if PCA9548A is under reset, what status will SCL,SDA,SC0-7,SD0-7 pins be?"

    -After holding RESET low for t(WL) amount of time: SC0-7,SD0-7 pins will all be deselected (the FET bridging them to SDA/SCL will become high impedance and look like an open circuit). SCL and SDA will be pulled up to Vcc unless a transceiver tied directly to this bus is communicating. SC0-7,SD0-7 pins would also be pulled up to 3.3V after being deselected assuming no devices are trying to communicate on these buses (typically the slaves are on this side so they won't talk until written to so they should just be Vcc).

    "Could these pins be tied with GND? All these pins are pulled up to 3.3V."

    -They should be pulled up to 3.3V. If you pull them down to GND, you have to be sure they are not turned back on (do not write to PCA9548A and select the pulled down channels) otherwise the bus will latch to GND and SDA/SCL will be in a stuck state. If you plan to NEVER turned them on, pulling them to GND should be okay.

    "In datasheet page 10, there is a figure like below. When this chip is under reset, what status would the MOS signed with red be? OPEN? CLOSE? UNCERTAIN?"

    -I'm pretty sure all those FETS are NMOS and in this case, the NMOS will be at Vcc until RESET is pull low for t(WL) then afterwards it will be pulled to GND. So initially it will be closed then after t(WL) it will be open (if you are thinking of it in terms of a switch).

    Note: t(WL) is 6ns minimum.

    -Bobby

  • Hi Bobby, thanks for your detailed answer, it is very helpful. You have just told me what happened after reset is done. But what if I wanna know what would be the status when in reset not after reset?
  • Hello,

    The reset function does not activate until reset is held for t(WL) amount of time. Therefore between 0 seconds and t(WL) PCA9548 should still operate as if it was never put into reset.

    After t(WL) amount of time has occurred the reset function will happen and reset the state machine AND deselect the channels.

    I assume you are asking if you continue to hold reset and sent communication to SDA/SCL. I believe the state machine will not see the SDA/SCL data until you release the reset pin. From this, all the FETS should stay off and look like high impedance (open circuit){gate pulled to GND}. In this case, you will not receive an ACK when trying to communicate to this device so the FETS will stay off until reset is released and the registers are written to again.

    thanks,

    -Bobby