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TMDS181: PCB layout and swapping

Part Number: TMDS181

Could some one please explain to me why the inputs are swapped with respect to standard HDMI connectors.

HDMI connector starts at pin 1 as D2+ and goes across from there.

But the TMDS181 (if you place them next to each other on a PCB) starts with CLK-

This seems crazy to me. Why not line them up??? What am I missing?

As for the Swap function, it's less than helpful. As the polarity will only swap in retimer mode for higher rates.

So even if I set the SWAP/POL = H, the product will only work at 2.0 data rates. 

I must be missing something, it can't really be this broken.  Oddly enough the DP159 does not have this problem

I tried to attached a picture, but that does not seem to work, so I will try and outline the issue here in text.

HDMI standard connector mounted on the top of the PCB with connector end up and leads down.

1          2      3     4       5       6 ... etc

D2+  GND  D2-  D1+ GND  D1- .... 

Wires connecting them

TMDS181 rotated 90deg so pin one is top right.

12       11        10     9      8       7 .... etc

CLK-  CLK+  3.3V  D0-  D0+ GND

  • Hello Colin

    We are working on your case. Thanks for your patient.

    Regards
    Francisco
  • Hello Colin

    It is not really clear to me which is the question or your concern. I've attached an example of the layout of these lanes.

    Please, also check our layout example section.

    Regards

    Francisco

  • The connector as show, is on the revers side of the board from the chip. 

    You can see this as the red traces coming from the chip change layers (now blue traces) at the connector to the other side of the board.

    Please note that on the output (right side), the red traces pass through directly and stay on the top of the board, 

    So on this board, the input is on the bottom of the board, and the output is on the top of the board. Weird!!!!

    Does TI just expect that HDMI input connectors are on the bottom of the board? I don't get this, are you able to explain why this was done.

    I suppose we could debate this derision for a while, but the truth it, it's been done and I am not going to be able to get TI to change it. But I would like to understand it.

    So the next questions is:

    If I really need the chip and the connector on the same side.

    I would like to be able to use the SWAP feature. 

    the problem is the +/- of all pairs will also be swapped.

    According to the datasheet, this will only function in retimer mode at 3Gbps and higher. 

    How does TI expect this to be resolved. I don't want a board that only works at higher rates.

    Thanks.

    CC :)

  • Colin

    This is part of the internal design. We can't modify the pinout up to next version. I recommend you to check layout techniques that can help you to have these lanes in a correct position.

    Regards
    Francisco
  • I figured that would be the standard answer, However...
    Can you please tell me why TI chose to do this?
  • Hello Colin

    I don't understand the point. On the other hand, the DP159 pinout is almost the same as the TMDS181.

    Regards
    Francisco
  • What point do you not understand. Go look at your own photo.

    The input connector on the left is on the bottom of the board and the signals need to go through vias to get to the chip on the top side.

    if the connector and chip are on the same side of the board all the pairs and polarity would be swapped!

    Do you not see this?

    Why did TI do this??????

    As for the DP159, using a display port connector, the connector and chips are on the same side and the pairs connect directly as they should.

    SECOND POINT

    I can't use the POL option because it only works at 3Gb and above. So if I put the connector and chip on the top of the board, and route the pairs directly on the top layer, the solution would only work at 3Gb and up.

    Please explain how this part is to be used when both the connector and part are on the top side of the board? Do you expect to just criss-cross the routing?

  • Hello Colin

    This is part of the layout Engineer task. These chips are very similar, then I suppose that the designers did a similar design for this reason. This forum is focused to help people with issues on our devices and try to help with the debug.

    Regards
    Francisco