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TPS65981: Legacy USB-A device Configuration

Manikandan M V
Intellectual 420 points
Part Number: TPS65981
Other Parts Discussed in Thread: , HD3SS3212, HD3SS460

Hi,

We have our TPS65981 make boards and flashed our application image. Our application has to work with USB-C and Legacy USB-A data ports.

I made an application image which works well with USB-C data ports (Ex: Google Pixel Phone). The USB2.0 and USB3.0 data path in the board are terminated on the right side of the USB-C connector.

However, it is not working with USB-A ports devices (say nominal USB-A laptops). The processor USB2.0 data path is not terminated on the USB-C connector and USB3.0 SS data path is always connected to Group-1 of the USB-C connector. I guess I'm missing out few configurations in the application. Below I have attached our application image which works well on USB-C ports FYR. Could you provide me appropriate configuration setting for working with USB-A port devices?

TIIU_MMB1 TPS65981 HD3SS460 UFP Only 20171204.pjt

Thanks.

  • 0
    TI__Mastermind 36756 points
    Hi Manikandan,

    It appears that you had USB EP enabled. This may affect the USB2.0 data with a legacy USB-A port as the TPS65981 will billboard on the USB 2.0 lines and disable USB 2.0 data. Can you disable USB EP in the System Configuration register and reflash your board?

    Thank you,
    Eric
  • 0 in reply to Eric Beljaars
    Intellectual 420 points

    Hi Eric,

    I have disabled both the USB EP and USB2.0 Billboard EP, yet the behavior remains unchanged. The processor USB2.0 data path is not terminated on the USB-C connector and USB3.0 SS data path is always connected to Group-1 of the USB-C connector. Do we have any other configuration missed out? Below is the latest project file FYR.

    TIIU_MMB1 TPS65981 HD3SS460 UFP Only 20171205.pjt

    Thanks.

  • 0 in reply to Manikandan M V
    TI__Mastermind 36756 points
    Hi Manikandan,

    I loaded your project file onto a TPS65981EVM with the DP Expansion EVM. I am able to enumerate a flashdrive on a laptop when connecting a Type-A to Type-C from the laptop to the EVM and connecting a flash drive to the DP Expansion EVM. Can you explain your test setup to me?

    Thank you,
    Eric
  • 0 in reply to Eric Beljaars
    Intellectual 420 points
    Hi Eric,
    Ok I see. The Latop is the USB-A host device and our board is USB-C data sink device. The Processor USB2.0/3.0 path is given to TPS65981 and HD3SS3212 mux respectively. With Google Pixel phone I can get the USB2.0/3.0 data connected properly. However, I'm unable to get the it connected on the Laptop USB-A port.

    Thanks
  • 0 in reply to Manikandan M V
    TI__Mastermind 36756 points
    Hi Manikandan,

    The template you provided has GPIO events for the HD3SS460 Mux. The events may be different for the HD3SS3212 mux. Can you share the schematic with me?

    Thank you,
    Eric
  • 0 in reply to Eric Beljaars
    Intellectual 420 points

    Hi Eric,

    Yes, the GPIO events will vary between two mux parts. Below is the TPS65981 schematics for your reference. It looks our boards are working with USB-C ports, the data path is getting terminated to correct group of the USB-C connector (we have disabled the DP Alternate Mode in our project, hope this may result working with USB-C devices).VVDN_USB-C_Controller_TPS65981_Schematics_20170811.pdf

    Thanks.

  • 0 in reply to Manikandan M V
    TI__Mastermind 36756 points
    Hi Manikandan,

    I noticed that the D+/D- lines are going through the TPS65981 Mux. The USB2.0 lines are not going through the HD3SS3212 mux so the GPIO events should not matter for USB2.0 data here. The TPS65981 will mux and pass through the data to your system, this is whatever you have connected to MY2_USB_DP and MY2_USB_DN in your schematic.
    For USB3.0 data, I noticed you have the "SEL" pin of the HD3SS3212 connected to GPIO15 which is mapped to "Port Connected CC2 (Cable Orientation Event)" Also, GPIO3 of the PD controller is connected to OE of the HD3SS3212 which is mapped to "Amsel Event" when this goes high, the HD3SS3212 will be shutdown. I would recommend assigning the appropriate GPIO events to GPIO3 and GPIO15 to work with the HD3SS3212 mux to get USB3.0 data working.

    Thank you,
    Eric
  • 0 in reply to Eric Beljaars
    Intellectual 420 points

    Hi Eric,
    The GPIO3 would be in Hi-Z when USB3 required without DP mode. We have external pull-down set to GPIO3, so the OE would be low (as expected by HD3SS3212) for my application.
    The GPIO15 assigned with CC2_CONN event, this terminates the processor USB3.0 SS pairs at the correct group of the USB-C receptacle (if cable plugged on CC1, processor SS pairs are connected on the group-1 pairs of the receptacle). Hope, this makes clear sense on the proper routing of the USB data path from Processor to USB-C receptacle.

    Thanks.

  • 0 in reply to Manikandan M V
    Intellectual 420 points
    Hi Eric,
    Do we any pending to analyze/diagnose on this legacy USB-A device mode function.

    Thanks.
  • 0 in reply to Manikandan M V
    TI__Mastermind 36756 points
    Hi Manikandan,

    You could measure the USB D+/D- lines at both the connector side and system side of the TPS65981. The TPS65981 will not affect the data on the USB2.0 lines it will just mux the data to handle the cable flip. I believe the issue of USB data may lie somewhere else in your system.

    Thank you,
    Eric
  • 0 in reply to Eric Beljaars
    Intellectual 420 points
    Hi Eric,
    Not only there is an issue in USB2.0, also the USB3.0 SS pairs are always terminated on the USB-C connector Group-1 side irrespective of the cable flip. We observe this behavior when connected with USB Type-A Laptops. I would also probe the D+/D- lines and try to understand the behavior.

    Thanks.