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DS90UB954-Q1: MIPI-CSI transmitter frequency setup

Part Number: DS90UB954-Q1


Hi all,
I am bringing up the 953/954 SerDes with a SONY IMX274 sensor. 
In the sensor datasheet, it says the sensor is D-PHY v1.1 compliant with maximum bitrate of 1.44Gbps/lane.
Here I have several questions regarding TI's 953/954. Please help.
1. In the datasheet of 953, it says the serializer is MIPI-CSI D-PHY v1.1 compliant. From the MIPI website, the D-PHY v1.1 supports up to 1.5Gbps/lane. However the 953 can only support up to 832Mbps/lane. Please explain the mismatch. 
2. In the datasheet of 954, it says the deserializer is MIPI-CSI D-PHY v1.2 compliant. From the MIPI website, the D-PHY v1.2 supports up to 2.5Gbps/lane. However the 954 can only support up to 1.6Gbps/lane. Please explain the mismatch.
3. If we set the 954 CSI transmitter output frequency to 1.6Gbps, is the 954 going to run at a constant 1.6GHz for all scenario or it will adjust the clk automatically depending on the bitrate needed. For example, for 10bit 1080p@30FPS, the bitrate is around 0.8Gbps considering some overhead. For a 4 lane MIPI-CSI output on 954, will each lane run at some frequency like 200MHz or 1.6GHz.
Thanks in advance,
  • Hello,
    In both cases 1 and 2 the maximum frequency range per lane is 'up to' and it is not required to support the maximum frequency. This is similar for imagers and processor CSI-2 interfaces as well.
    For item 3 the CSI rate of the 954 will be at 1.6Gbps/lane when configured to this rate (other choices are 800Mbps/lane or 400Mbps/lane). CSI-2 is a packet based system so when there is no data, the Tx port will go into LP mode. Once there is data to Tx it will resume at 1.6Gbps.