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SN75DP126: HPD_SRC defectuous

Yannick Coquereau
Prodigy 100 points
Part Number: SN75DP126

Dear support,

The SN75DP126 device should provides the status of the Hot Plug Detect sink (HPD_SNK input) from a monitor to the digital controller (HPD_SRC output).


On a specific printed board assembly, one device is faulty responding and gives a HPD_SRC high level while the input HPD_SNK is low.

This occurs every time the board is powered cycled but does not always occur when the device is cooled down just before powered on or when the component was not supply for a period longer than tenth of seconds.

The behavior can be reproduced on the printed circuit board without other interfaces connected (base board not plugged in meaning no i2c communications) than the following:

-          3v3 chip supply

-          5V DDC

-          No load on HPD_SRC

-          External HPD pulled up to 5V DDC or pulled down to ground via 1kOhm

  • A forced reset (EN pin tied low during power cycling) did not remove the issue.

  • Second Test reading out the FORCE_HPD_SRC bit from the i2C register content does not show unexpected value.

I2C read dev:5b reg:01 data:01

  • A Soft reset command (I2C_SOFT_RESET) sent via I2C to the SN75DP126 switch (U3) did resets the switch registers but did not remove the issue..

I2C write dev:5a reg:1b data:80

  • in the picture details from the chip marking and assembly layout

  • 0
    TI__Expert 5455 points
    Hello Yannick

    Can you share the schematic of your application? Where do you have the connection of DDC power? Do you have the lanes connected directly to 5 V?
    Do you have a different connection in case of this specific board? Please, share more details regarding of the board where you have this issue.

    Regards
    Francisco
  • 0 in reply to Francisco Javier Zamudio
    Prodigy 100 points

    Hi Fransisco,

    Find here below the  implementation schematic.

    In the former post, I did made the screenshots with external supplies for 3v3 and 5v5.

    We do generate the 5V DDC on-board and you can see in the screenshot below what happens during a software reboot after which we see the problem. 

    Whereas nothing in the datasheet mentioned this could be an issue, we did correct this in our firmware. Eventually the problem persist with this individual chip.

  • 0 in reply to Yannick Coquereau
    Prodigy 100 points
    Dear Francisco,

    We performed a test where PRIORITY pin is forced high instead of low and it seems that this brings the HPD_SRC in the expected state.
    Please explain, because the DP_HPD_SNK is not used and always pull-down (internally by 130k and externally by 1k).

    With kind regards,