LMH1983: Question about LockStepSize

Hi Hiroshi-San,

One of my colleague supports LMH1983 but he is out of the office and i am helping at the moment.

Please allow me to provide some background and answer to your question. When the CLOCK1 PLL is in a LOCK condition, the VCXO frequency (or a multiple of it) is exactly the same as the reference frequency. If the reference frequency has no jitter or wander on it and the VCXO does not drift,
then the system will continue to run with no adjustment made to the control line on the VCXO. If there is jitter on the reference, then the PLL will supply positive and negative pulses to the loop filter, to try to keep the VCXO tracking the reference. If the PLL is out of lock, then the PLL will be generating many pulses to try and drive the VCXO to the proper frequency. The lock detect circuit in the LMH1983 declares NOLOCK
if the number of pulses sent out in a specified period exceeds a certain threshold. The LOCK_STEP_SIZE register specifies the period of time over which the LMH1983 counts pulses, and is measured in terms of Hsync pulses, the LOCK_THRESHOLD register specifies the maximum number of pulses that can be expected within this period and have the device still considered to be in LOCK. If the input signal has a lot of jitter on it,
it is possible that the number of pulses will exceed LOCK_THRESHOLD, in which case NOLOCK will remain active, even though the PLL is remaining in a locked condition. What the datasheet is explaining is that to make the LOCK determination time the fastest, you load LOCK STEP_SIZE with a 1 (minimum amount of time to look at pulses) and LOCK_THRESHOLD with a 31 which is a large number, indicating that even if there is significant activity, the device should declare LOCK.

Regards,,nasser