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DS90UB953-Q1: Clock out feature trouble

Brian Antheunisse
Expert 5325 points

Part Number: DS90UB953-Q1

Hi Guys,

I have a customer using the 954/953 and has the following issue:

I have two 953’s driving a single 954.  I want to take advantage of the synchronous line interleaving mode to allow us to split our incoming camera across two 953 links and recover it as a single link.  We plan on doing that by sending every other line on the 953’s and recombine it at the 954, which appears to be what is being described in section 7.5.28.4 of the 954 datasheet.  I don’t have the camera data ready to send down the links, so I am trying to do it via a pattern generator on both 953’s.  Each has the line width of our sensor, but half the number of lines, to simulate line interleaving.  If I am reading the status registers correctly, It does not appear that I have that set up correctly:

 

Registers for Deserializer

0x00: 0x60, 0x00, 0x1E, 0x20, 0xDF, 0x01, 0x00, 0xFE, 0x1C, 0x10, 0x7A, 0x7A, 0xBF, 0x09, 0x09, 0x5F,

0x10: 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,

0x20: 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0x30: 0x00, 0x00, 0x00, 0x43, 0x01, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x14, 0x6F, 0x00, 0x40,

0x40: 0x00, 0xE0, 0x71, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x12, 0x43, 0x14, 0x64,

0x50: 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x5E, 0x00, 0x00, 0x30, 0x20, 0x00, 0x00, 0x00,

0x60: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x30, 0x01,

0x70: 0x6B, 0x6C, 0xE4, 0x02, 0x1C, 0x0F, 0x00, 0xC5, 0x00, 0x01, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,

0x80: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0x90: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xA0: 0x02, 0x0F, 0x00, 0x00, 0x08, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xB0: 0x08, 0x0E, 0x20, 0x08, 0x25, 0x00, 0x18, 0x00, 0x8C, 0x33, 0x83, 0x74, 0x80, 0x00, 0x00, 0x00,

0xC0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xD0: 0x00, 0x43, 0x94, 0x01, 0x60, 0xF0, 0x02, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00,

0xE0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xF0: 0x5F, 0x55, 0x42, 0x39, 0x35, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

 

Registers for Serializer 0

0x00: 0x30, 0x00, 0x33, 0x48, 0x00, 0x03, 0x83, 0x0A, 0xFE, 0x1E, 0x10, 0x7F, 0x7F, 0xF0, 0x0F, 0x00,

0x10: 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x18, 0x3C, 0x80, 0x62, 0x62, 0x62, 0x00, 0x00, 0x00, 0x00,

0x20: 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x67, 0x33, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,

0x30: 0x00, 0x20, 0x09, 0x05, 0x00, 0x10, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0x40: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0x50: 0x20, 0xC0, 0x45, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x07, 0x07, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,

0x60: 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0x70: 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x00, 0x00, 0x00, 0x00, 0x00,

0x80: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00,

0x90: 0x32, 0xE3, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x07, 0x00, 0x00, 0x0E,

0xA0: 0x00, 0x0E, 0x0E, 0x0D, 0x0E, 0x10, 0x42, 0x10, 0x10, 0x10, 0x03, 0x01, 0x00, 0x00, 0x00, 0x00,

0xB0: 0x02, 0x03, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xC0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xD0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xE0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xF0: 0x5F, 0x55, 0x42, 0x39, 0x35, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

 

Registers for Serializer 1

0x00: 0x30, 0x00, 0x33, 0x48, 0x00, 0x03, 0x83, 0x0A, 0xFE, 0x1E, 0x10, 0x7F, 0x7F, 0xF0, 0x0F, 0x00,

0x10: 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x18, 0x3C, 0x80, 0x62, 0x62, 0x62, 0x00, 0x00, 0x00, 0x00,

0x20: 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x67, 0x33, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,

0x30: 0x00, 0x20, 0x09, 0x04, 0x00, 0x11, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0x40: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0x50: 0x20, 0xC0, 0x45, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0x07, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,

0x60: 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0x70: 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x00, 0x00, 0x00, 0x00, 0x00,

0x80: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,

0x90: 0x32, 0xE3, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x00, 0x03, 0x0A, 0x06, 0x10,

0xA0: 0x00, 0x11, 0x0F, 0x0F, 0x10, 0x10, 0x42, 0x10, 0x10, 0x10, 0x05, 0x01, 0x00, 0x00, 0x00, 0x00,

0xB0: 0x02, 0x03, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xC0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xD0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xE0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

0xF0: 0x5F, 0x55, 0x42, 0x39, 0x35, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

 

 

Also, we plan on creating a clock at the 953’s, using the clock out feature.  I can’t seem to get that to work properly.  If fact, I accidently left off the reference clock completely from the 954 and the system appeared to function normally.  I corrected that issue and added a 24 MHz clock (based on the frequency I could generate from my microcontroller) and put that into the 954.  Using the clock out function, I tried to get a 72 MHz clock out of the 953.  The clock coming out of the 953 is very distorted and does not appear to be based on the clock input at the 954.

 

I am getting PASS and LOCK on both channels and I don’t seem to have any issue talking to the serializers over the link. 

 

Above is my register settings for the three parts.  Let me know if you see anything odd in the settings.

Thanks,

Brian

  • 0
    TI__Expert 3055 points
    Hi Brian,

    At the moment, it seems you have configured clock out to be 75 MHz. You can get closer to your desired value of 72 MHz by setting the HS_CLK_DIV to 4 (953 register 0x06), M to 1 (953 register 0x06) and N to 14 (953 register 0x07). This should result in a CLK_Out of 71.43 MHz. Another thing to note is that a minimum load impedance at the CLK_OUT/IDX pin of 35 kΩ is required when using CLK_OUT function.

    Can you confirm that the 954 REFCLK meets the datasheet specifications (Table 2 of the 954 datasheet)? The REFCLK defines the back channel rate which in synchronous mode determines the forward channel rate that is then used for the CLK_Out on the 953.

    Are you using EVMs for this or a customer board?

    In terms of the interleaving/pattern generation, can you please provide how you are configuring the pattern generation?
    Since this configuration is done via indirect access registers it is not included in your register dump.

    You mention that based on status registers you do not think you have configured this properly. I see that the 954 is saying that the CSI Tx port is not synchronized, are there other status indicators you are referring to? The 954 is detecting 540 lines with a line length of 3840 bytes. Just to confirm, this is what you are expecting right?

    As well, some of the 954 registers will change value based on which port is selected in register 0x4C. Can you please send me a register dump with port 0 selected for reads as well?

    Regards,
    Zoe
  • 0 in reply to Zoe Nuyens
    TI__Expert 5325 points

    From customer:

    At the moment, it seems you have configured clock out to be 75 MHz. You can get closer to your desired value of 72 MHz by setting the HS_CLK_DIV to 4 (953 register 0x06), M to 1 (953 register 0x06) and N to 14 (953 register 0x07). This should result in a CLK_Out of 71.43 MHz. Another thing to note is that a minimum load impedance at the CLK_OUT/IDX pin of 35 kΩ is required when using CLK_OUT function.

                 Customer:  I am putting a 24 MHz ref clock into the 954, not the 25 MHz, so I think these are the right values for 72 MHz output

    Can you confirm that the 954 REFCLK meets the datasheet specifications (Table 2 of the 954 datasheet)? The REFCLK defines the back channel rate which in synchronous mode determines the forward channel rate that is then used for the CLK_Out on the 953.

    Customer: I am putting in a 24 MHz, 20 PPM clock with an output of 1.8 V (VCCIO voltage).  I measured the 10% – 90% rise time at 3.6 nsec.

    In terms of the interleaving/pattern generation, can you please provide how you are configuring the pattern generation?

    Since this configuration is done via indirect access registers it is not included in your register dump.

    Customer: Here are the writes to the 953’s for the pattern generator:

     printf("\r\n");

     printf("Set up serializer pattern generator, port 0\r\n");

     printf("Set indirect region to pattern generator, auto increment, port 0\r\n");

     I2C_Buffer[0] = 0xB0;

     I2C_Buffer[1] = 0x02;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set indirect address to 0x04\r\n");

     I2C_Buffer[0] = 0xB1;

     I2C_Buffer[1] = 0x04;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set line size MSB, 0x04\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x0F;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set line size LSB, 0x05\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x00;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set bar size MSB, 0x06\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x01;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set bar size LSB, 0x07\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0xE0;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set active lines MSB, 0x08\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x04;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set active lines LSB, 0x09\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x38;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set total lines MSB, 0x0A\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x04;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set total lines LSB, 0x0B\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x72;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set line period in 10nsec increments, MSB, 0x0C\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x02;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set line period in 10nsec increments, LSB, 0x0D\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0xF2;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set vertical back porch, 0x0E\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x21;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set vertical front porch, 0x0F\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x19;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Set indirect address to 0x01\r\n");

     I2C_Buffer[0] = 0xB1;

     I2C_Buffer[1] = 0x01;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     printf("Enable pattern generator\r\n");

     I2C_Buffer[0] = 0xB2;

     I2C_Buffer[1] = 0x01;

     if (HAL_I2C_Master_Transmit(&hi2c1, (uint16_t)DS953_P0, I2C_Buffer, 2, I2C_Timeout) !=HAL_OK)

            printf("I2C transmit error\r\n");

     HAL_Delay(100);

     

    Same writes were done to the other 953.

    You mention that based on status registers you do not think you have configured this properly. I see that the 954 is saying that the CSI Tx port is not synchronized, are there other status indicators you are referring to? The 954 is detecting 540 lines with a line length of 3840 bytes. Just to confirm, this is what you are expecting right?

               Customer:  The whole frame should be 3840 x 2160, so this is not what I am expecting

    As well, some of the 954 registers will change value based on which port is selected in register 0x4C. Can you please send me a register dump with port 0 selected for reads as well?

    Customer:  Here is the updated register dump:

    Set port selected to port 0

    Registers for Deserializer

    0x00: 0x60, 0x00, 0x1E, 0x20, 0xDF, 0x01, 0x00, 0xFE, 0x1C, 0x10, 0x7A, 0x7A, 0xBF, 0x09, 0x09, 0x5F,

    0x10: 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,

    0x20: 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x30: 0x00, 0x00, 0x00, 0x43, 0x01, 0x01, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x14, 0x6F, 0x00, 0x40,

    0x40: 0x00, 0xE0, 0x71, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x01, 0x03, 0x14, 0x64,

    0x50: 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x5E, 0x01, 0x00, 0x30, 0x18, 0x00, 0x00, 0x00,

    0x60: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x62, 0x04,

    0x70: 0x2B, 0x2C, 0xE8, 0x02, 0x1C, 0x0F, 0x00, 0xC5, 0x00, 0x01, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,

    0x80: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x90: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xA0: 0x02, 0x0F, 0x00, 0x00, 0x08, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xB0: 0x08, 0x0E, 0x20, 0x08, 0x25, 0x00, 0x18, 0x00, 0x8C, 0x33, 0x03, 0x74, 0x80, 0x00, 0x00, 0x00,

    0xC0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xD0: 0x00, 0x43, 0x94, 0x00, 0x60, 0xF0, 0x02, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01, 0x00, 0x00, 0x00,

    0xE0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xF0: 0x5F, 0x55, 0x42, 0x39, 0x35, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    Set port selected to port 1

    Registers for Deserializer

    0x00: 0x60, 0x00, 0x1E, 0x20, 0xDF, 0x01, 0x00, 0xFE, 0x1C, 0x10, 0x7A, 0x7A, 0xBF, 0x09, 0x09, 0x5F,

    0x10: 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00,

    0x20: 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x30: 0x00, 0x00, 0x00, 0x43, 0x01, 0x01, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x14, 0x6F, 0x00, 0x40,

    0x40: 0x00, 0xE0, 0x71, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x12, 0x43, 0x14, 0x64,

    0x50: 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x5E, 0x00, 0x00, 0x30, 0x20, 0x00, 0x00, 0x00,

    0x60: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x30, 0x01,

    0x70: 0xED, 0x6C, 0xE4, 0x02, 0x1C, 0x0F, 0x00, 0xC5, 0x00, 0x01, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,

    0x80: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x90: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xA0: 0x02, 0x0F, 0x00, 0x00, 0x08, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xB0: 0x08, 0x0E, 0x20, 0x08, 0x25, 0x00, 0x18, 0x00, 0x8C, 0x33, 0x03, 0x74, 0x80, 0x00, 0x00, 0x00,

    0xC0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xD0: 0x00, 0x43, 0x94, 0x01, 0x60, 0xF0, 0x02, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00,

    0xE0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xF0: 0x5F, 0x55, 0x42, 0x39, 0x35, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    Registers for Serializer 0

    0x00: 0x30, 0x00, 0x33, 0x48, 0x00, 0x03, 0x23, 0x50, 0xFE, 0x1E, 0x10, 0x7F, 0x7F, 0xF0, 0x0F, 0x00,

    0x10: 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x18, 0x3C, 0x80, 0x62, 0x62, 0x62, 0x00, 0x00, 0x00, 0x00,

    0x20: 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x67, 0x33, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x30: 0x00, 0x20, 0x09, 0x05, 0x00, 0x10, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x40: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x50: 0x20, 0xC0, 0x45, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x07, 0x07, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x60: 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x70: 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x80: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00,

    0x90: 0x32, 0xE3, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x07, 0x00, 0x00, 0x0E,

    0xA0: 0x00, 0x0E, 0x0E, 0x0D, 0x0E, 0x10, 0x42, 0x10, 0x10, 0x10, 0x03, 0x01, 0x00, 0x00, 0x00, 0x00,

    0xB0: 0x02, 0x03, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xC0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xD0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xE0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xF0: 0x5F, 0x55, 0x42, 0x39, 0x35, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    Registers for Serializer 1

    0x00: 0x30, 0x00, 0x33, 0x48, 0x00, 0x03, 0x22, 0x50, 0xFE, 0x1E, 0x10, 0x7F, 0x7F, 0xF0, 0x0F, 0x00,

    0x10: 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x18, 0x3C, 0x80, 0x62, 0x62, 0x62, 0x00, 0x00, 0x00, 0x00,

    0x20: 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x67, 0x33, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x30: 0x00, 0x20, 0x09, 0x04, 0x00, 0x11, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x40: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x50: 0x20, 0xC0, 0x45, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0x07, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x60: 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x70: 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x00, 0x00, 0x00, 0x00, 0x00,

    0x80: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,

    0x90: 0x32, 0xE3, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x00, 0x03, 0x0A, 0x06, 0x10,

    0xA0: 0x00, 0x11, 0x0F, 0x0F, 0x10, 0x10, 0x42, 0x10, 0x10, 0x10, 0x05, 0x01, 0x00, 0x00, 0x00, 0x00,

    0xB0: 0x02, 0x03, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xC0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xD0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xE0: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    0xF0: 0x5F, 0x55, 0x42, 0x39, 0x35, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

    Press a key when ready

     

     Also, note I am seeing a 63 MHz clock output from the 953, where I expect a 72 MHz.

  • 0 in reply to Brian Antheunisse
    TI__Expert 5325 points

    Also, this is a custom board the customer designed.

    Thanks guys!

    Brian

  • 0 in reply to Brian Antheunisse
    TI__Expert 3055 points

    Hi Brian,

     

    I am still looking into some parts of this, but I have a few comments right now.

    Your customer is right that their original register settings for 0x06 & 0x07 should generate the right output when a 24 MHz clock is provided. I tried generating a 72 MHz clock with a refclk of 24 Mhz using these original settings and did not see the 63 MHz seen by your customer. I'm still looking into what else could be wrong, but I don't believe it is their register settings for clk_out.

     

    In terms of pattern generation, I have two comments:

    1) The total line count should be increased by 2 to include frame start and frame end

    2) The line period of 7.54 us is too short. Changing the line period to a value greater than 9.6 us should allow them to see the expected number of lines, 1080.

    Regards,

    Zoe

  • 0 in reply to Zoe Nuyens
    TI__Expert 5325 points
    Zoe,

    Just wanted to ping you guys here now that most of us are back from holidays. Any more progress? You mentioned you were still looking into this.

    Thanks,
    Brian
  • 0 in reply to Brian Antheunisse
    TI__Expert 3055 points

    Hi Brian,

    I double checked how a few registers work on the 954 and from the register dumps it appears your customer's link should be operating at the expected speed. In terms of the clk_out, here are the two settings I would recommend:

    1) 0x06 = 43, 0x07 = 28. This should be 72 MHz, but because N/M is not an integer, there is some expected jitter.

    2) 0x06 = 41, 0x07 = 0x0D. This is expected to be 73.8 MHz, but N/M is an integer so the jitter will be reduced.


    The important difference from your customer's original settings is using a lower HS_CLK_DIV, which may improve performance (see the 953 datasheet section 7.4.1.3 for more info on this).

    In terms of the pattern generation, did they have a chance to try my suggestions? Are they seeing the expected results now?

    Regards,

    Zoe

  • 0 in reply to Zoe Nuyens
    TI__Expert 5325 points
    Apparently something else popped up, and they had to divert their attention for a while. I will close this post, and reopen later on if/when they start working on it again.

    Thanks for the help so far!

    Regards,
    Brian