SN65LVPE504: PCIe Redriver operation problem.

Schematic attached.

Hi Gyosun,

I would connect the EN_RXD pins = Low.  There is likely an issue with the detection timing. Setting the repeater terminations to "active" should speed up the detection of valid receivers on the host and remote sides of the PCIe link.

Regards,

Lee

Hi Sledjeski,

Thank you for your help.
As mentioned, the EN_RXD (R3, R21) pin is set low.
However, the PCIe link is still not connected. Could you take a closer look?

Thank you.
Best regards,

gyosun.

Hi Gyosun,

The schematic indicates R3 and R21 are NC - did the board get modified to include these two resistors?

If the SN65LVPE504 input terminations are equal to Zrx-dc ~ 55 ohms there should be no problem with receiver detection from the system components.

Since the system is working without the repeater; I would set the OS and EQ = 0, DE = Float or VDD/2.  These settings will minimize the repeater gain.

Regards,

Lee 

Hi Sledjeski,

I have set the resistor as described below.

EN_RXD(R21,R3) => 10K pull-down.
OS(R7, R19) => 10K pull-down.
EQ(R10, R18) => 10K pull-down. 
DE => NC

However, the link is not yet connected.
When measuring the power consumption of + 3.3V, 312mA is consumed.
The configuration is as shown below, and the PCIe length between PC and FPGA is about 31 inches.

Is there a problem with the configuration? Where should I see more?
Or should I add another redriver (SN65LVPE504) to the FPGA board?

Thank you.

Best regards,

gyosun.