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DS90UB953-Q1: Link lost status

Tomoaki Yoshida91
Genius 5255 points
Part Number: DS90UB953-Q1


Hi team,

I have a question.

The register 0x52 GENERAL_STATUS.LINK_LOST_FLAG:

What is this register judging that the link is established?

In the description of the LINK_LOST_FLOG, there is CRC_ERROR and HS_PLL_LOCK.

If the CRC error is not detected and the HS_PLL is locked, is the back channel considered to be valid?

Best regards,

Tomoaki Yoshida

  • 0
    TI__Genius 10475 points
    Yoshida-san,

    Register 0x52[0] is the back channel link detect status bit (set to high when back channel is valid) and 0x52[1] is the back channel CRC error bit (set to high when back channel errors are detected). In case there are back channel CRC errors, the no of CRC errors is stored in the CRC error counter registers CRC_ERR_CNT1 and CRC_ERR_CNT2 (0x55 and 0x56).
  • 0 in reply to Palaniappan Manickam
    Genius 5255 points
    Hi Palaniappan-san,

    Thank you for your support.

    What is the condition that the back channel is valid?
    Since LINK_LOST_FLAG is written like the line below, I understand that the state of locking HS_PLL and no CRC error is a condition where back channel is valid condition.
    "This bit is set if a change in BC LINK DET lost status has been detected. This
    bit is cleared upon read of CRC ERR CLR register or HS PLL loses lock."

    Best regards,
    Tomoaki Yoshida
  • 0 in reply to Tomoaki Yoshida91
    TI__Genius 10475 points
    Yes, you can look at the CRC errors via registers to verify that the back channel is valid.