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LMH1983: LMH1983 holdover and LOR operation

Part Number: LMH1983

Dear Team,

Please see below questions from my customer :

  1. Operation on Holdover mode:
    “When locked to reference, an internal 10-bit ADC will track the loop filter control voltage.
    When a loss of reference (LOR) occurs, the LMH1983 can be programmed to hold the control voltage to maintain output accuracy within ±0.5 ppm (typical) of the previous reference.
    The LMH1983 can be configured to re-synchronize to a previous reference with glitch-less operation.”
    For what period of time could the Holdover synchronization be kept (what is the deviation rate from the original reference)?
  2. Scenario of wrong input format and transition to Free-run mode:
    In case the input format (Hin, Vin) is not recognized by the LMH1983 as a known\legit format right from the start/power-up.
    The reference was never locked and the LOR mode (register 0x05 bit 2) is set to its default value (0= Holdover on LOR).
    Will in this case the LMH be transiting to a Free-Run mode (though it is configured to a holdover on LOR)?

Best regards,

Nir

  • Please give me a couple of days to get back to you.

    Regards,

    Alan

  • 1. The deviation rate depends on the VCXO and its characteristics: Kv (tuning sensitivity- lower is better to minimize frequency shift due to Vc error) and frequency stability (lower is better, especially over temp).  I can only answer this generally, since the period of time would depend on the frequency failure limits, VCXO operating conditions during holdover/free-run, etc.  A VC-TCXO would be best, but may not provide enough pullability to lock to a reference input outside of it's pull range.

    2. An invalid/unsupported or spurious input on the Hin pin could cause the PLL to attempt lock, and change the holdover control voltage on the VCXO.  I suggest to gate-off an invalid input from the Hin pin to ensure the PLL has no input and holdover voltage can be maintained during LOR.

    Regards,
    Alan