Hi,
I would like to ask about DP83867IS clock input.
On the datasheet, when using OSC, if it is not OSC for 1.8V
It says to divide with Cap as shown below.
Our circuit is designed to use 3.3V Clock buffer as below and 1.8V input with resistor divider (R640 and R633).
Question 1) If I follow the recommendation from TI, it would not work.
Question 2) Is it acceptable to divide it as 120 ohm, 150 ohm as we designed? If not, please let us know what we need to consider.
We are in the process of revision and would like to help you get your answer.
thanks,
TS
