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DS90UB914A-Q1: no signal output

Stephen Liu
Prodigy 160 points
Part Number: DS90UB914A-Q1

Hi   Sirs,

We  suffer  a  issue : UB914  cann't output

May you please help to give us some suggestion . thank you very much.

The architecture is as the following:

1.  AR0144 (PCLK 74.25Mhz  12bits  parallel mode) -> UB913 ->UB914

2.  DS90UB913A/914A Operation with Pixel Clock from Imager as Reference Clock.

3. We configure  the UB914 as 12 bits high speed mode.

4. Before the sensor is streaming(no PCLK to UB913), we can access UB913 and finish the sensor registers's configure.

    But  after we let sensor stream on( provide PCLK to UB913) we cann't access both UB913 and sensor anymore(via I2C ), and there are no signal out in all UB914  PCLK /Hsync/Vsync.

    At that moment the value of UB914's register 0x1c  will change to 0x02(means no lock)   from  0x03(before the PCLK is provided)

5. We  cehck sensor out (i.e. UB913 input) , it do have the  PCLK /HSync /Vsync signal  and looks like that the format is ok. 

6. Our sensor PCLK high duty cycle is not enough to 40%( spec define 0.4T) , is this is  very critical ? (even no PCLK output at UB914) 

Would you please help to give us some advise  according to your experience?   thank you very much 

  • 0
    TI__Mastermind 30515 points
    Stephen,
    please make sure UB913a and UB914a both work in 12bits mode. do you use external CLK or PCLK as PLL refer. clock?

    best regards,
    Steven
  • 0 in reply to Steven(Shenzhen) Shi
    Prodigy 160 points

    Steven,

    Thanks a lot for your reply.

    Our case was using the PCLK as PLL refer source and the PCLK frequency is 74.25Mhz.

    We had a test to decrease the PCLK to 44Mhz but the TI914 PCLK output was about 62Mhz.   

    After we use the external CLK as PLL refer source, this issue is solved and TI914 will output the correct PCLK and Hsync/Vsync .

    So  it looks like that the sensor output PCLK is not qualified for the PLL source.

    What do you think for the root cause please ? PCLK from imager's duty is not qualified or jitter amplitude not qualified? 

    May I consult you one more question ? 

    For UB964 , it has a register(0x6D) for configuring the STP or Coax Mode but no this kind of register in UB914. 

    I mean ,for UB914, the registers settings are the same no matter in coaxial or STP Mode?

    thank you 

    Stephen

  • 0 in reply to Steven(Shenzhen) Shi
    Prodigy 160 points
    Hi Steven,
    Thanks for the support.

    Our case was using the PCLK as PLL refer source and the PCLK frequency is 74.25Mhz.

    We had a test to decrease the PCLK to 44Mhz but the TI914 PCLK output was about 62Mhz.

    After we use the external CLK as PLL refer source, this issue is solved and TI914 will output the correct PCLK and Hsync/Vsync .

    So it looks like that the sensor output PCLK is not qualified for the PLL source.

    I would like to know that the root cause of this knid of issue(UB913A output PCLK is much higher than UB913A input PCLK) is releated to PCLK duty cycle issue? or PCLK jitter issue ?

    May I consult you one more question ?

    For UB964 , it has a register(0x6D) for configuring the STP or Coax Mode but no this kind of register in UB914.

    I mean ,for UB914, the registers settings are the same no matter in coaxial or STP Mode?

    thank you
  • 0 in reply to Stephen Liu
    TI__Mastermind 30515 points
    1. please check ub913a d/s, it has one pin to set the external or pclk mode, please secure this setting is correct.
    2. you can use UB934, which is one new part for your application.

    best regards,
    Steven