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DS250DF810: EN_SMB and READ_EN timing requirement

Part Number: DS250DF810

Hi,

Do we have any timing requirement for EN_SMB and READ_EN during their level transition?

Thanks!

Antony

  • No explicit timing requirement.

    EN_SMB should be perpetually floating for Master mode or perpetually pulled up to VDD for Slave Mode. Depending on EN_SMB fixed setting, this determines what the host does with READ_EN_N:

    • SMBus Master Mode (EN_SMB=Float):When asserted low, initiates the SMBus master mode EEPROM read function. Once EEPROM read is complete (indicated by assertion of ALL_DONE_N low), this pin can be held low for normal device operation.\
    • SMBus Slave Mode (EN_SMB=1): When asserted low, this causes the device to be held in reset (SMBus state machine reset and register reset). This pin should be pulled high or left floating for normal operation in SMBus Slave Mode.

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer

  • Hi Rodrigo,

    Customer would like us to check specifically their applications scenario for these two signals as described below.  Will you provide your comments?

    •  For EN_SMB , they only use 1K pull-up resistor to 2.5V.  I think it should be ok.

    • For READ_EN (see schematics in the bottom), customer drive the signal  “RETIMER0_1V8_RD_EN_FET_G” to drive “RETIMER0_READ_EN_N” from either High to Low or High to Low.  Because they saw some sharp waveform in RETIMER0_READ_EN_N, they add 0.1uF at Q1.G (at  RETIMER0_1V8_RD_EN_FET_G) to solve this issue.  By doing this,  it will impact the rise/fall timing of RETIMER1_READ_EN_N. Please double confirm if the rise/fall time listed as below after they add 0.1uF is ok for us.

      Rise time : 404.6 ns (no cap)  -> 979.6 ns (0.1uF)

      Fall time :  56.28 ns (no cap)  -> 1.070 us (0.1uF)

    Thanks!

    Antony

  • I don't foresee a problem with the customer's configuration.

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer