Hi team,
I have some questions about error detection registers of 953 and 954.
#1 When ALARM function is enabled
953.0x52[1] GENERAL_STATUS.CRC_ERR
954.0x51[4] SENSOR_STS_0.BCC_ALARM
I understand that if 953.0x52[1] will be cleated, 954.0x51[4] will be also cleared.
It is written that "This bit is cleared upon read of CRC ERR CLR register", but will 953.0x52[1] and 954.0x51[4] not be cleared when writing to 953.0x49[3] CRC ERR CLR register?
#2 When ALARM function is enabled
Is the 954.0x51[3] LINK_DETECT_ALRAM set to the same value as 953.0x52[4] LINK_LOST_FLAG?
In that case, will 954.0x51[3] and 953.0x52[4] be cleared if it is written to CRC ERR CLR?
#3
I understand that If 954.0x56 RX_PAR_ERR_LO is read, 0x4D[2] PARITY_ERROR, 0x55 and 0x56 are all cleared.
Is it correct?
Best regards,
Tomoaki Yoshida