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DS90UB940-Q1: I2S clock

Part Number: DS90UB940-Q1


Hi,TI,

I'd like to confirm the I2S clock of Ds90UB940. could you please answer the questions ?

Q1. Is it possible to use the I2S clock at 705.6KHz ?

Q2. In the  "8.3.12.2 I2S Jitter Cleaning" in the data sheet,   It mentioned that

       .... less than 1MHz, this feature must be disabled through register 0x2B[7]......

      But  the add:0x2b[7]  was reserved and there is no description in the data sheet.

     In order to bypass the jitter cleaner, user should set 1 to the 0x2b[7], correcgt ?  

  • Hello Kobayashi,

    If the I2S clock is lower than 1MHz, Reg 0x2B[7] should be 1 and Reg 0x2B[6] should be 0 to disable PLL. 

    If you have the setup, you can test if I2S works in that configuration. If you don't have, please tell me and I can test for you.

    Best regards,

    Cera