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DS125DF111: DS125DF111 Config issue

Part Number: DS125DF111
Other Parts Discussed in Thread: DS125BR111

Hello  Expert , 

I have a new SFP+ module project which will use DS125DF111 , I need a config file about DS125DF111, I checked the datasheet that there have nothing introduce about Bypass config , could you send it to my email : dong.liu@avnet.com, thanks . 

  • Hi Liu,

    To Bypass the DS125DF111 CDR and minimize the input CTLE gain write the following Channel Registers.

    Channel Register         Default Value           New Value           Comment

    0x09                              00                            20                         Override output MUX setting

    0x1E                              E1                            01                         Set MUX to output Raw Data

    0x2D                              80                            88                         Override CTLE setting

    0x03                              00                            00                         Manual CTLE setting

    Regards,

    Lee

  • Hi Lee ,

    get it , could you help to supply a register fault config map about DS125DF111 , I will use the function of loopback mode . thanks .
  • Hi Liu,

    Are you looping back A to B and B to A?

    What datarates are needed?

    Regards,

    Lee

  • Hi Lee,

    My test plan is that use INA connect to Optical module RX (electric port), and use OUTA connect to optical module TX(electric port) , then let INA and OUTA loop by internal . for INB and OUTB is the same function.

    the datarates need support 1.25G  to 10G , support 1/2/4/8 divider from 10G datarates .

    could you help to supply the  fault config register map to me , thanks

  • Hi Liu,

    The DS125BR111 default connections are INA -> OUTA and INB -> OUTB so no register programming should be needed to create a loopback to the optical module.

    The DS125BR111 default datarates are 9.8304, 4.9152, 2.4576, 1.2288 and 12.288, 6.144, 3.072, and 1.5625 Gbps

    Since you want to lock to different rates a few locations in CHA registers and CHB registers will need to be updated.

    0x60 = 0 and 0x61 = B2     /* Allows DF111 to lock to 10.0, 5.0, 2.5, and 1.25 Gbps

    0x62 = 90 and 0x63 = B3   /* Allows DF111 to lock to 10.3125, 5.15625, 2.5078, and 1.25039 Gbps

    0x64 = FF     /* Sets PPM frequency tolerance

    Regards,

    Lee

  • Hi Lee ,

    thanks for you support . I will try , thanks .