Hello team,
Hope you are doing well. Please see below customer question:
We are using the TI Sync Separator LMH1981MTX/NOPB along with a low jitter DSPLL device from a clock synthesizer/jitter cleaner. This is our circuitry for receiving a Genlock video signal. The Horizontal Sync from the LMH1981 is the reference input to the synthesizer/jitter cleaner.
Genlock is not a new concept for us, but this is the first product using Genlock.
My task at hand is to determine the Horizontal Sync frequency in order to configure the DSPLL and thereby program the DSPLL for our prototype boards.
The minimum setting for the DSPLL is 128khz.
We are considering buying the AJA GEN10 SD/HD/AES sync generator for lab testing. For prototype purposes I would like to pick one of the GEN10 outputs and determine the Horizontal Sync frequency. Later we can SPI in to the DSPLL and modify register to select corresponding Horizontal Sync frequencies to the Genlock input.
Any help you can provide please do.
Regards,
Randhir