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LMH1981: Determine horizontal sync frequency in order to configure the DSPLL

Part Number: LMH1981


Hello team,

Hope you are doing well. Please see below customer question:

We are using the TI Sync Separator LMH1981MTX/NOPB along with a low jitter DSPLL device from a clock synthesizer/jitter cleaner. This is our circuitry for receiving a Genlock video signal. The Horizontal Sync from the LMH1981 is the reference input to the synthesizer/jitter cleaner.

Genlock is not a new concept for us, but this is the first product using Genlock.

My task at hand is to determine the Horizontal Sync frequency in order to configure the DSPLL and thereby program the DSPLL for our prototype boards.

The minimum setting for the DSPLL is 128khz.

We are considering buying the AJA GEN10 SD/HD/AES sync generator for lab testing. For prototype purposes I would like to pick one of the GEN10 outputs and determine the Horizontal Sync frequency. Later we can SPI in to the DSPLL and modify register to select corresponding Horizontal Sync frequencies to the Genlock input.

Any help you can provide please do.

Regards,
Randhir

  • Hi Randhir,

    Thanks for the information! From what I understand the Horizontal Sync frequency will be timed to the bit rate of the incoming video signal. Which type are they using? The other things to note is that these sync pulses from HSOUT are negative pulses and you want to trigger on the first falling edge. If the clock synthesizer/ jitter cleaners trigger on a positive edges, then some inversion should be done from the HSOUT.

    Regards,

    Brian Wang
  • Thanks for the response. Right now I do not no all the possible reference signals that we need to support. We are looking at buying an AJA GEN10 HD-SD Sync Generator10 Blackburst & Tri-level Generator for the lab to support prototype testing. Looking at the specifications of the AJA, there are several possible reference signals. With the AJA attached to the prototype we can scope the HS signal from the LMH1981 and determine all the HS frequencies.

    About the inversion - this will introduce jitter. Do you have a recommended inverter to use?

    Gary

  • Brain,

    The HS sync feeds the differential input to a DSPLL from SiLabs. I can use the negative input to get the inversion.

    Gary
  • Gary,

    Sorry took a while for me to get back to this. Sounds like you are good to go and ready for testing with prototype boards. Let us know if the results from the LMH1981 aren't as expected. Thanks!

    Regards,

    Brian Wang