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DP83822IF: Link loss detection in case of TD+ and TD- invalid data insert

Hirotaka Matsumoto
Guru 27585 points
Part Number: DP83822IF

Hi all

Would you mind if we ask DP83822IF?

Does Link loss detection occur in case of TD+ and TD- invalid data insert?
TD+/TD- and RD+/RD- is connected internally.
However, we think they separate, so it doesn't cause of Link loss detection.

Kind regards,

Hirotaka Matsumoto

  • 0
    TI__Mastermind 23675 points
    Hi Matsumoto-san,

    Do you mind letting me know what mode the PHY is in?
    Is the PHY in 10BASE-T, 100BASE-TX or 100BASE-FX?
    Also, when you say invalid data and link loss detection, are you referring to RX_ER?
  • 0 in reply to Ross Pimentel
    Guru 27585 points

    Ross san

    Thank you so much for your reply!

    Do you mind letting me know what mode the PHY is in?
    ->PHY is normal operation.not FLD
       After PHY is Link up, our customer adds noise to TD+/TD- pins.
       "TD+ and TD- invalid data insert" means noise insert.

    Is the PHY in 10BASE-T, 100BASE-TX or 100BASE-FX?
    ->100BASE-TX.

    Also, when you say invalid data and link loss detection, are you referring to RX_ER?
    ->Our customer confirmed that RX_ER counter increases.
       However, in this case inserting noise to RD+/- at the same time, our customer would like to know whether "TD+ and TD- invalid data insert" is relation to RX_ER or not, just in case.

    We appologize that our explanation makes you confuse.

    Kind regards,

    Hirotaka Matsumoto

    TD+ and TD- invalid data insert