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SN65DSI83: Compatibility of this bridge chip with display controller DLPC6401

Pankil Shah
Expert 1040 points
Part Number: SN65DSI83
Other Parts Discussed in Thread: DLPC6401, , SN65DSI86, SN65DSI85

Hi Support Team,

We are working on one product design, where we need some information from your side.

For this product, our processor will emit video data in DSI form and the same data needs to be provided to connected Display controller (TI - DLPC6401) in LVDS form.

Here, we are planning to use DSI to LVDS bridge chip TI - SN65DSI83 in between.

So, mentioned bridge chip and display controller are compatible to each other completely?

Also, we like to understand that what are the common necessary parameters required for both of to be compatible?

Thanks,

Pankil Shah

  • 0
    TI__Mastermind 18655 points
    Hello pankil,
    The SN65DSI83 is not compatible with tthe DLPC6401. Thed display controller supports DP so you can use the SN65DSI86 which is bridge device between MIPI DSI and eDP.
    Regards
  • 0 in reply to Joel Jimenez0
    Expert 1040 points
    Hi Joel,

    Thanks for your response.

    If this controller supports DP then definitely we cant' use.
    But We referred www.ti.com/.../DLPC6401 for DLPC6401 display controller, where they mentioned
    "Provides a Single Channel, LVDS Based, Flat-Panel Display (FPD)-Link Compatible Input Interface".

    From which we understood that it is supporting LVDS input.

    Please correct us.

    Thanks,
    Pankil Shah
  • 0 in reply to Pankil Shah
    TI__Mastermind 18655 points
    Hello Pankil,
    You are correct the device supports LVDS input. Please, confirm if the supported formats match with the LVDS output formats in section 8.4.4 of the SN65DSI85 datasheet.
    Regards
  • 0 in reply to Joel Jimenez0
    Prodigy 30 points
    Hello Joel,

    Thanks for your response.

    For the same project thread, we have some queries related to implementation.

    1. We have configured below register with its value mentioned.
    Please let us know if any changes are required in sequence or value.
    0. PLL_EN_STAT = 0
    1. Assert_EN
    2. Delay = 1
    3. CHA_ACTIVE_LINE_LENGTH = 1280 or 0x500
    4. CHA_VERTICAL_DISPLAY_SIZE = 800 or 0x320
    5. CHA_HSYNC_PULSE_WIDTH = 80 or 0x050
    6. CHA_VSYNC_PULSE_WIDTH = 9
    7. CHA_SYNC_DELAY = 32
    8. CHA_HORIZONTAL_BACK_PORCH = 40
    9. CHA_VERTICAL_BACK_PORCH = 7
    10. CHA_HORIZONTAL_FRONT_PORCH = 40
    11. CHA_VERTICAL_FRONT_PORCH = 7
    12. LVDS_CLK_RANGE = 62 MHz to 87.5 MHz
    13. DSI_CLK_DIVIDER = 3
    14. CHA_DSI_LANES = 4
    15. CHA_DSI_CLK_RANGE = 430 to 435 MHz
    16. CHA_24BPP_MODE = 24bpp mode (format 2)
    17. Delay = 100
    18. Start video stream
    19. PLL_EN_STAT = 1
    20. Delay = 10 ms
    21. Soft_reset = 1


    2. For the video parameters like Horizontal, Vertical Sync, etc... we need to set these parameters according to DLPC6401 controller for resolution of 1280*800.

    We set the video parameters as above, but in DLPC6401 data sheet -Section 7.3.1.5 where they mentioned different data for video parameters.

    So we need to know about video parameters for 1280 x 800 resolution that we have to configured on sn65dsi83 to send to DLPC6401 controller.

    1. Horizontal and Vertical Sync Pulse
    2. Sync Delay for Horizontal and Vertical Sync
    3. Front and Back porch for Horizontal and Vertical Sync

    Thanks,
    Nilesh Patil
  • 0 in reply to Nilesh Patil
    TI__Mastermind 18655 points
    Hello Nilesh,
    I'm not familiar with the DLPC6401 video parameters. Please, post your question of the DLPC6401 in the Video and Data Display > DLP Video and Data Forum.
    I suggest you using DSI Tuner to configure the SN65DSI83 based on the parameters you get from the DLP team. Once you confirm those parameters, I can help you to review the DSI84 settings.
    Regards