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Hi, Team
My customer did the OCP test on TPS65983B,
When system tested the OCP at 6A, we found the external FET will be damaged(Q2) .
We found the PD controller will limit output current around 4~5A when over current be detected; then the external MOSFET be damaged(Q2).
Could you please help to check OCP behavior which is normal or abnormal by below waveform?
Hi Ray,
The OCP behavior seems normal to me. But I did notice that the customer is NOT using the proper FET's according to the Tahini reference Design. For thunderbolt systems to behave properly, one MUST copy the Intel reference design and not deviate from it.
The Tahini reference design has CSD16323Q3 FET's. Please have the customer use these FET's and copy the reference design when building a Thunderbolt system. I hope this helps If this answers your question, PLEASE select This resolved my issue.
Hi Ray,
Since we closed this thread, could you PLEASE select This resolved my issue
Thank you so much for your question and choosing TI parts for your design :-)