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TLK10232: Bit Error Rate Testing

Cassidy
Prodigy 620 points
Part Number: TLK10232


Is there a method to obtaining the BER from the TLK10232 in-chip? While the EVM GUI has this functionality it would be nice to not have to deal with level translators and other interface issues to use USB. The device has Error counter registers for each lane as well as a High BER condition detect register. Are reading these registers sufficient enough to obtain a true bit error rate?

  • 0
    TI__Prodigy 620 points
    The TLK10232 has built-in a bit error counter. Basically, a low BER can be achieved with a totally closed input eye if the signal impairments are primarily "equalizable" - that is, they result from physical media losses/reflections/etc. that can be compensated by a decision feedback equalizer (DFE). This capability of the device is encompassed by the jitter tolerance specification, which indicates BER < 1e-12 operation in the presence of channel attenuation, additional random and deterministic jitter, and broadband random noise.
    To reduce the BER, the device should be tuned through HS_SERDES_CONTROL_2 & HS_SERDES_CONTROL_3 to optimize the link according the characteristics of the system (AC losses, length of traces, etc.)