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DS90UB953-Q1: DS90UB953-Q1

Uma Sundaram
Prodigy 105 points
Part Number: DS90UB953-Q1
Other Parts Discussed in Thread: DS90UB954-Q1,

Hi,

We are designing a pair of Serializer and Deserializer boards using DS90UB953-Q1/ DS90UB954-Q1 pair, for camera application using Power Over Coax.

Can you please clarify us the below queries regarding  PCB layout.

 

          Q1. We are maintaining a trace width of 50 Ohms impedance for coaxial output signal to Serializer/Deserializer (SERDES) IC. But on connecting the same signal to PoC filter network, we could not maintain the trace width, as it needs to carry higher current.

Can the coaxial output signal trace width vary when connecting to PoC filter. Or is 50 Ohms trace width need to be maintained even for PoC filter input.

SERDES TOP LAYER:


               

SERDES BOTTOM LAYER:


 

SERDES TOP and BOTTOM LAYER:


         

Q2. We are connecting the coaxial output signal to AC coupling capacitor near SERDES IC.

Is care need to be taken on PCB layout (eg: voids under capacitor) to avoid impedance mismatch.


 

 You help is highly appreciated.

 

Thanks in anticipation,

Uma

 

  • 0
    TI__Expert 8165 points
    Hello-

    Maintaining the tight impedance control is very important. In the 954 datasheet we specify return loss targets that we recommend to meet on your PCB layouts (Table 223 in the 954 datasheet). These targets apply to both, 953 and 954 designs.

    The layout example of a PoC network and how to connect it to the high-speed trace is given in Figure 58. Note that the current going through the PoC filter should be kept below 250mA.

    Regards,
    Davor