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DS80PCI102: Deemphasis Level

Part Number: DS80PCI102

Hi,

Though my customer is trying to pass PCIe 1.1 Compliance Test, they can not pass below items on their system.

- Tx, Template Tests (PCIE 1.1)

- Tx, Peak Differential Output Voltage (Transition)(PCIE1.1)

- Tx, Deemphasized Voltage Ratio (PCIE 1.1)

   (Another items can be passed.)

Please refer also the attached file.

4130.DS90PCI102 waveform.xlsx

Setting data seems to be correct as attached.

(EEPROM seems to be read correctly because DONE pin is asserted.)

:10000000000010000004070000ED40000ED4002F97
:10001000AD4002FAD400005F5A8005F5A8005F5A8F
:100020008005F5A800005454FFFFFFFFFFFFFFFF0E
:10003000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFD0
:10004000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC0
:10005000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFB0
:10006000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFA0
:10007000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF90
:10008000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF80
:10009000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF70
:1000A000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF60
:1000B000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF50
:1000C000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF40
:1000D000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF30
:1000E000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF20
:1000F000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF10
:10010000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
:10011000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEF
:10012000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFDF
:10013000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFCF
:10014000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFBF
:10015000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFAF
:10016000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF9F
:10017000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF8F
:10018000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF7F
:10019000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF6F
:1001A000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF5F
:1001B000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF4F
:1001C000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF3F
:1001D000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF2F
:1001E000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF1F
:1001F000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF0F
:00000001FF

Though DEM is set to -3.5B, the effect of deemphasis only 0.6dB according to above test results of  "Deemphasized Voltage Ratio (PCIE 1.1)".

What is the cause to reduce effect of deemphasis?  

Should we set deephasis more stronger(i.e. -6dB, -9dB)?

Please send me email(kuramochi@fujiele.co.jp) if you need more information(i.e. a detail of test results, schematic).

Best Regards,

Kuramochi

  • Hi Kuramochi-san,

    Based on the EEPROM file, it looks like the test is only being performed on Channel A. Is this correct?

    I reviewed the EEPROM file, and it looks like the DS80PCI102 CH A is programmed correctly for what is labeled in the filename.

    De-emphasis can be reduced if the output trace from the DS80PCI102 is too long (several inches). In this case, the peaks from the de-emphasis postcursor will settle to the main cursor levels.

    Before looking deeper at the DS80PCI102, I'm curious about the test environment (schematic, layout, test setup, etc.) . The input signal to the DS80PCI102 does not look very clean. Is there any reflections on the signal that could be causing this?

    Thanks,

    Michael
  •  Hi Kuramochi,

    The current settings look like they are achieving the correct de-emphasis level.

    The Red arrow shows the peak to peak value of approximately 1080 mV   (Passes 800mv to 1200mV specification)

    The Blue arrow shows the de-emphasized value of approximately 800mV or -2.6 dB  (Passes -2.5 dB to -4.5 dB specification)

    To me this looks like a measurement error by the protocol tool.  This waveform will work very well in a GEN1 PCIe system.

    Regards,

    Lee

  • Michael-san,

    Thank you for your advice.

    I'm researching customer's test enviroment.

    Lee-san,

    Thank you for your information.

    The waveform you show is input signal.

    Best Regards,

    Kuramochi

  • Hi Kuramochi-san,

    I highlighted the waveform output file.  The input file was different.

    Regards,

    Lee 

  • Lee-san,

    Thank you for your support.

    output waveform.xlsx

    Though the waveform is improved as the attached file, they don't still pass the compliance test.

    Fail parameter is "Tx, Deemphasized Voltage Ratio".

    I think that transition bit should not be implemented deemphasis as below.

    However observed waveform is implemented de-emphasis on transition bit, 

    Can we delay to implement de-emphasis as red broken line on the above attached file?

    or is there any way or confirmation to pass the compliance test?

    Please let me know if you have any question.

    Best Regards,

    Kuramochi

  • Hi Kuramochi-san,

    The de-emphasis applied from our DS80PCI102 Tx output is not necessarily one bit time long. It is possible for the de-emphasis to occur in less than one bit time length after a transition, especially at lower data rates such as 2.5G. We do not have configurable control over how long the de-emphasis waveform is.

    For tests that require you to implement either -3.5 dB or -6 dB on the transmitter, we have been able to pass compliance tests after applying the corresponding -3.5 dB or -6 dB settings with the DEMA / DEMB pin settings or by register control, then run with the compliance software.

    Which de-emphasis settings were used for the waveform shown in tab "20180227"?

    Thanks,

    Michael