HI，TI Team
The output clock of this chip shows a Gaussian distribution of two frequency points on the PCBA, but the average value is the same as the input clock and the video is displayed normally. Therefore, I doubt if this phenomenon is a chip inherent phenomenon.So I test the chip DS90CF388 separately.The chip welding on an empty PCB, only provide power and the input clock and the input clock matching resistance, all of the power supply with dc voltage source. The input clock generated by FPGA LVDS function, the clock stability only 13 ps jitter, there are four input clock frequency 50 MHz, 60 MHz, 65 MHz and 69.5 MHz. Test the output clock is still two frequency .
I can not find the reason why there are two frequencies now. May I ask you any suggestions?
Regards,
Jian Wang
