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DP83867IR: unstable linkup

Guru 15520 points
Part Number: DP83867IR

Hi,

My customer are using TI Giga Ether PHY and have a question.

They are using 2 DP83867IR and connecting each other via RJ45.
When auto-negotiation(by bootstrap), the link up is unstable.
Mostly it will linkup but sometimes it doesn't linkup.

When it doesn't linkup, they setup the software reset from DP83867 register
as a workaround and it will linkup.
We dont' know why it will linkup if software reset been issued.
Is it easier to establish linkup by doing the software reset operation?
Or is it by chance?

best regards,
g.f.

  • Hi g.f.

    Do the DP83867 devices share the same clock? Can you show me a schematic?

    This can occur due to DP83867 running synchronously, using the same clock on the same board. This is caused by auto-mdix switching at the same time. It can make link times increase. The solution is resetting 1 PHY. Or powering up 1 PHY slightly later than the other.

    Best Regards,
  • Hi Rob,

    Thank you for the reply.
    This question is from my customer, so that it is hard to share their schematic at E2E.
    But I think it is availabe to share via TI local FAE, should I ask to my local TI FAE?

    In customer board, there are two DP83867IR(let's say PHY_A and PHY_B).
    PHY_A clock input(XI) are supplied from external X'tal(25MHz) and PHY_B clock input(XI) are supplied from PHY_A CLK_OUT.
    So, I anserwed to my customer that their workaround( software reset) is fine.

    best regard,
    g.f.
  • Hi g.f.

    You could share the schematic with your local FAE, but the problem is coming from the shared reference clock.

    The software reset workaround is the best solution.

    Best Regards,
  • Hi Rob,

    Thank you for the reply.

    I think it's not necessary to check their schematic for now.

    best regards,
    g.f.