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PCA9306: Supplying same 1.8V voltage to VREF1 and VREF2

Andrey Filippov
Prodigy 50 points
Part Number: PCA9306

The question is similar to previously resolved one, but I need 1.8V on both sides. For my application I have a limited number of the GPIO pins that I plan to use for I2C during initialization (read ID flash, set DC voltages), then disconnect i2c bus and use the same FPGA GPIO signals for non-i2c signals. Probably TCA980x can be better, but these devices  do not fit mechanically, I need a smaller package (like X2SON).

Is it possible to use PCA9306 with both sides at 1.8V to disconnect I2C buses? Or is there a better solution? Speed is not critical, there will be just 4 slaves on the device side of the bus, other side connected to a pair of GPIOs.

Andrey

  • 0
    TI__Guru 72161 points

    Hey Andrey,

    "For my application I have a limited number of the GPIO pins that I plan to use for I2C during initialization (read ID flash, set DC voltages), then disconnect i2c bus and use the same FPGA GPIO signals for non-i2c signals."

    Are you able to show what the block diagram of this would look like? I'm a bit confused on if you are using the FPGA GPIOs for I2C communication then switching it for actual GPIO usage. During this time are you communicating through the PCA9306 for I2C communication and what happens after you switch to general GPIO usage (do you disable PCA9306 or do you assume 1.8V on both sides of the device will disable it?<--if this please see below)

    "Is it possible to use PCA9306 with both sides at 1.8V to disconnect I2C buses?"

    -Setting PCA9306 to 1.8V on both sides does not disable the device. What you will see happen is when a signal (on side 1 OR 2) is a low (if SCL or SDA pull to GND) then the device will pass the low. This is unwanted and could glitch the slaves on the opposite side.

    "Or is there a better solution?"

    -You can pull the EN pin to GND which will stop signals from passing from one side to another. This of course will require a GPIO from the FPGA.

    Thanks,

    -Bobby

  • 0 in reply to BOBBY
    Prodigy 50 points
    Hello Bobby,

    Here is the full (unfinished) circuit diagram on our wiki: wiki.elphel.com/.../103982 (-> wiki.elphel.com/.../103982_sch.pdf ). It shows U4 TXS0102DQMR, but I did not notice that it is not specified to work with both supplies at 1.8V so I'm looking how to replace that IC and considering PCA9306.

    There are 4 GPIOs from the FPGA on the other board available that switch between I2C and SPI used on the image sensor The sensor reset signal distinguishes between I2C and SPI mode, it is generated when the multifunction GPIO (named here as TCK[0]) stays low long enough (discriminated by U6). And that signal (SNS_PRST) is high when the sensor (and SPI) are reset, and I2C (and U4) are enabled. After initilaization, SNS_PRST goes low, and I2C should be disconnected, the same FPGA ports (PX_SDA[0] and PX_SCL[0]) become SPI_CLK and SPI_MOSI.

    So yes, I use EN signal. And I'm open to use alternative (to PCA9306) devices, just need it to have a small package, work with 1.8V on both A and B, and have EN input to completely disconnect I2C.
  • 0 in reply to Andrey Filippov
    TI__Guru 72161 points
    Hey Andrey,

    It looks like you should be able to use the PCA9306 to isolate the two sides with the EN pin and both sides at 1.8V.

    Just to be sure, are you using this device solely to isolate the I2C buses when you pull the EN pin low? (If so then I believe this will work and is the best choice in terms of size and cost.)

    If you are also trying to use this device as an I2C buffer for capacitance, then this will not work (PCA9306 is a voltage level translator and not a buffer).

    Thanks,
    -Bobby
  • 0 in reply to BOBBY
    Prodigy 50 points
    Bobby, thank you I'll use PCA9306. Only isolation is needed, no buffering. Do I need the 200 KOhm resistor and capacitor and connect EN to Vref2 as on "Figure 8. Typical Application Circuit (Switch Enable Control)", or is it OK to just keep both Vref1, Vref2 at directly 1.8V power rails and use 1.8-referenced EN signal?
  • 0 in reply to Andrey Filippov
    TI__Guru 72161 points
    Hey Andrey,

    "Do I need the 200 KOhm resistor and capacitor?"
    -You do not need the capacitors on either side of Vref1 or Vref2. The 200k ohm value resistor isn't really necessary (in your case because Vref1=Vref2) but I would still recommend a resistor on the EN pin to 1.8V to protect the device from inrush current upon start up. (EN pin goes to a FET gate) This value can be lower in the thousands of ohm range.

    "is it OK to just keep both Vref1, Vref2 at directly 1.8V power rails and use 1.8-referenced EN signal?"
    You could actually just GND the Vref1 and Vref2 pins and reference the EN signal to 1.8V (with a pull up resistor) because you are not using this device as a translator anymore. Vref1 and Vref2 (tied to EN) are meant to establish a reference voltage for other circuitry in the device, you do not need this function for what you are doing.

    If you do not want to GND the vref1 and Vref2 pins, you can set it up the way you've stated in your question but be sure to use a pull up resistor on the EN pin.

    Thanks,
    -Bobby
  • 0 in reply to BOBBY
    Prodigy 50 points
    Bobby, so do I put a resistor (say 5.6K) from EN to 1.8V rail as an actual pullup (in parallel to the logic driving EN), not in series (between logic output and EN input) as shown on Figure 8?
  • 0 in reply to Andrey Filippov
    TI__Guru 72161 points
    Hey Andrey,

    Sorry for the confusion here, you should have the resistor from the EN pin to the GPIO (logic output). To reiterate, a resistor between the logically output and the EN pin and nothing else (not connected to a constant 1.8V supply).

    Thanks,
    -Bobby
  • 0 in reply to BOBBY
    Prodigy 50 points
    Got it. Thanks!