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DS90UB949-Q1: Length matching requirements

Senthil kumar Irulappan
Prodigy 185 points

Part Number: DS90UB949-Q1

We are using the DS90UB949 Serializer in our design to convert the HDMI to FPD Link. We use in dual link mode. The HDMI is connected to TI Jacinto JC6 DRA756 processor.

Is there any length matching requirements in the PCB layout for the FPD Links. Do we need to match the FPD Link DOUT0 and DOUT1 trace lengths? If so, what is the tolerance allowed?

Also Is there any length matching requirements for the HDMI Links? IN_D[2:0] & IN_CLK. Right now we are matching only the intra pair P/N lengths.

  • 0
    TI__Expert 8165 points
    Hello-

    FPD-Link III receivers can tolerate up to 2 pixel clocks of skew between DOUT0/RIN0 and DOUT1/RIN1 lanes, therefore pair-to-pair skew is not very critical on the PCB. Tight intra-pair skew is always recommended (<5 mils) to minimize common mode noise and EMI/EMC concerns.

    The HDMI 1.4 specifies allowable pair-to-pair and intra-pair skew. For an HDMI receiver (e.g. DS90UB949-Q1), the allowable pair-to-pair skew is 0.2 x tCHARACTER + 1.78 ns, where tCHARACTER is time duration of 10 bits. The intra-pair skew is specified as 0.15 x tBIT, where tBIT is time duration of a single bit. Keeping the intra-pair skew as tight as possible is recommended.

    Regards,
    Davor