SN65DSI83: LVDS display will repeat showing red, green, blue, black, white, checkerboard, grey

Benson Huang

Prodigy 50 points

Part Number: SN65DSI83

Hi,

Processor: NXP i.MX8

Panel: Innolux G070Y2-L01

------------------------ ------------------------ -----------------------------

| i.MX8 | -----------------> | SN65DSI83 | -----------------> | Innolux G070Y2-L01 |

| | | | | |

------------------------ ------------------------ -----------------------------

We use SN65DSI83 to transform MIPI DSI signal to LVDS display.

When we turn on test pattern mode (CHA test pattern is 1), we can see the test pattern.

But when we turn off test pattern mode (CHA test pattern is 0), LVDS display will repeat showing red, green, blue, black, white, checkerboard, grey.

Here are some questions.

1. What will SN65DSI83 operate if test pattern mode is turned off? Will it just transform MIPI DSI signal to LVDS signal?

2. If we set some wrong CSR values, will SN65DSI83 generate the special pattern?

Please help to give me some advice.

Thanks.

over 7 years ago

0 Benson Huang over 7 years ago

Prodigy 50 points

Attach some files for reference.

1. dsi file and CSR file (Setting.zip)

2. Panel spec

3731.Setting.zip

6024B0250301_G070Y2-L01 ver 3.4 for Sturdy_C7_2017.pdf

0 Benson Huang over 7 years ago in reply to Benson Huang

Prodigy 50 points

Attach the screenshots of DSI Tuner.

0 Ikechukwu Anyiam over 7 years ago in reply to Benson Huang

TI__Mastermind 35130 points

Hi Benson,

We will look into this and get back to you.

Regards,
I.K.

0 Joel Jimenez0 over 7 years ago in reply to Benson Huang

TI__Mastermind 18655 points

Hello Benson,

What is the procedure you are following in order jump from the internal test pattern to normal operation? Is it just clearing the test pattern bit?

In normal operation, it is mandatory to follow the power-up sequence state in the device datasheet. Please, confirm your system is meeting every step. Can you send captures showing EN and DSI data and clock signals at EN assertion (during power-up)?

Regards,

0 Benson Huang over 7 years ago in reply to Joel Jimenez0

Prodigy 50 points

Hi Joel,

We just clear the test pattern bit (CHA_TEST_PATTERN, from 0x10 to 0x00) to normal operation.

We have one more question to ask.

Except the internal test pattern, will SN65DSI83 generate another kind of test pattern in some condition (Ex: set wrong register value, DSI data is wrong or other error case...) ?

Thanks.

Best Regards

Benson

0 Joel Jimenez0 over 7 years ago in reply to Benson Huang

TI__Mastermind 18655 points

Hello Benson,

There is an error reporting register in the offset 0xE5 that can help to detect the conditions you mentioned.

We suggest clearing this register (by writing 0xFF) before attempting to read from it.

Regards

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SN65DSI83: LVDS display will repeat showing red, green, blue, black, white, checkerboard, grey